Fin Isolation Structure With Etch Stop for Reliable Semiconductor Scaling
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Solution Overview
Problem
As semiconductor devices scale down, their operation characteristics deteriorate, necessitating improved methods to enhance integration and performance.
Innovation Solution
Incorporating an etch stop pattern with a different insulating material than the device isolation layer, along with a fin structure design that includes a gate electrode and channel structure, to improve electrical characteristics and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If device isolation layer is used to separate fin structures, then electrical isolation is achieved, but etching damage to the isolation layer occurs during manufacturing
Solution Approach 1:
An etch stop pattern is introduced as an intermediary layer between the fin structure and the device isolation layer. This etch stop pattern serves as a protective mediator that prevents etching damage from reaching the device isolation layer during manufacturing processes, while allowing the device isolation layer to maintain its electrical isolation function.
Solution Approach 2:
The etch stop pattern is formed in advance before the device isolation layer is fully processed. This preliminary action ensures that the protective layer is already in place to prevent etching damage during subsequent manufacturing steps, protecting the device isolation layer before it can be damaged.
2Productivity
If fin structures are placed close together for high integration, then device density increases, but etching control becomes difficult
Solution Approach 1:
The etch stop pattern acts as a mediator that improves etching control between closely spaced fin structures. By providing a distinct etching stop layer, it enables better control of etching depth and prevents over-etching, allowing fin structures to be placed closer together while maintaining manufacturing precision.
3Device complexity
If device isolation layer is directly exposed, then manufacturing steps are simplified, but interposed portion cannot be protected
Solution Approach 1:
The etch stop pattern serves as a protective intermediary layer that covers the interposed portion of the device isolation layer. This intermediary structure protects the interposed portion from damage while adding minimal complexity to the manufacturing process, as the etch stop pattern can be formed using standard deposition and patterning techniques.
Data Source
AI summary
Provided is a semiconductor device including: a first fin structure extending in a vertical direction; a second fin structure extending in the vertical direction, wherein the second fin structure is spaced apart from the first fin structure; an etch stop pattern between the first fin structure and the second fin structure; a lower insulating layer in contact with a lower surface of the first fin structure, a lower surface of the second fin structure and a lower surface of the etch stop pattern; a device isolation layer including an interposed portion on the etch stop pattern, between the first fin structure and the second fin structure; a gate electrode overlapping the interposed portion and the first fin structure; a channel structure overlapping the gate electrode; and a source/drain pattern connected to the channel structure. The etch stop pattern includes a different insulating material from the device isolation layer.