Silicon Oxide Fin Isolation Liner for Strain and Charge Trap Control
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Solution Overview
Problem
Current FinFET manufacturing processes face challenges in generating beneficial strain and reducing charge trapping in the channel, leading to suboptimal transistor performance due to the use of high-density trap materials like silicon nitride and inadequate strain application during the oxidation process.
Innovation Solution
The process involves forming a silicon liner and oxidizing it into a silicon oxide liner, which generates beneficial strain and reduces charge trapping by using a conformal deposition of silicon oxide as a barrier, followed by an annealing process to convert the silicon liner into a silicon oxide liner, thereby improving tensile stress and channel performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high-density trap materials like silicon nitride are used for isolation regions, then isolation effectiveness is improved, but charge trapping in the channel increases and transistor performance deteriorates
Solution Approach 1:
The patent changes the material composition parameters of the isolation region by forming a silicon oxide liner (SiO2) between the semiconductor fin and the isolation dielectric material. This material substitution reduces the trap density compared to using high-density trap materials like silicon nitride directly contacting the fin, thereby reducing charge trapping while maintaining isolation effectiveness.
Solution Approach 2:
The silicon oxide liner acts as an intermediary layer between the semiconductor fin and the isolation dielectric material. This intermediate layer prevents direct contact between the fin and materials that would cause charge trapping, while still providing effective isolation. The liner mediates between the conflicting requirements of isolation effectiveness and charge trapping reduction.
2Reliability
If oxidation process is applied to generate strain in the channel, then transistor performance is improved, but excessive strain may cause defects and reliability issues
Solution Approach 1:
The patent employs feedback control in the oxidation process by monitoring and controlling the oxidation conditions (temperature, time, atmosphere) to achieve the desired strain level in the channel. The oxidation of the silicon liner generates tensile strain that improves carrier mobility, but the process parameters are carefully controlled to prevent excessive strain that would create defects. This feedback mechanism ensures optimal strain without harmful effects.
3Stress or pressure
If silicon liner is oxidized to form silicon oxide liner, then beneficial tensile strain is generated in the channel, but volume expansion may cause stress on surrounding structures
Solution Approach 1:
The patent applies local quality by forming the silicon oxide liner with specific thickness and composition characteristics tailored to generate the desired strain in the channel region. The liner is positioned specifically at the interface between the fin and isolation region, and its oxidation generates localized tensile strain in the channel without causing excessive stress on surrounding structures. The local control of oxidation conditions ensures beneficial strain generation while maintaining structural integrity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the tensile stress in FinFET channels by 0.3% and improves transistor performance by reducing leakage currents and charge trapping, while maintaining control over the oxidation process to avoid excessive strain.
Implementation Method 1
oxidizing the silicon-containing layer to form a first liner. The first liner comprises oxidized silicon
Implementation Method 2
depositing a silicon-containing layer extending into the trench, wherein the silicon-containing layer extends on the sidewall of the semiconductor strip
Implementation Method 3
followed by an annealing process to convert the silicon liner into a silicon oxide liner
Data Source
AI summary
A method includes etching a semiconductor substrate to form a trench and a semiconductor strip. A sidewall of the semiconductor strip is exposed to the trench. The method further includes depositing a silicon-containing layer extending into the trench, wherein the silicon-containing layer extends on the sidewall of the semiconductor strip, filling the trench with a dielectric material, wherein the dielectric material is on a sidewall of the silicon-containing layer, and oxidizing the silicon-containing layer to form a liner. The liner comprises oxidized silicon. The liner and the dielectric material form parts of an isolation region. The isolation region is recessed, so that a portion of the semiconductor strip protrudes higher than a top surface of the isolation region and forms a semiconductor fin.