Fin Isolation Structure for Void-Free Semiconductor Trenches

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Solution Overview

Problem

Existing semiconductor devices face challenges with voids in isolation patterns, which can lead to deteriorated insulation properties and electrical characteristics.

Innovation Solution

The semiconductor device incorporates a multi-layer isolation structure comprising a first isolation pattern covering active fins, a third isolation pattern extending through the first pattern, and a second isolation pattern with a circular or elliptical cross-section, ensuring complete trench filling and void-free insulation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a single-layer isolation pattern is used to fill the trench, then the manufacturing process is simple, but voids may occur and insulation properties deteriorate

Engineering Contradiction:
Improveisolation pattern formation processVSAvoidinsulation properties
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The isolation pattern is divided into multiple layers (first isolation pattern and second isolation pattern) with different materials and functions. The first isolation pattern covers the lower sidewall of active fins, while the second isolation pattern fills the trench and extends through the first pattern, creating a segmented structure that eliminates voids and ensures complete insulation without compromising manufacturing feasibility.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention uses composite materials consisting of different dielectric materials for the first and second isolation patterns. The first isolation pattern may use a material with good adhesion to the active fin sidewall, while the second isolation pattern uses a material optimized for trench filling and insulation, creating a composite structure that achieves both manufacturing ease and superior insulation properties.

Inventive Principle:
Principle #40Composite materials

2Ease of manufacture

If the isolation pattern does not completely fill the trench, then the manufacturing process is easier, but voids occur and electrical characteristics deteriorate

Engineering Contradiction:
Improvetrench filling processVSAvoidtrench filling completeness
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The first isolation pattern is formed as a preliminary layer before forming the second isolation pattern. This preliminary action of covering the lower sidewall with the first pattern creates a foundation that guides and supports the subsequent trench filling with the second pattern, ensuring complete filling without voids while maintaining manufacturing ease through sequential processing.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The second isolation pattern is nested within the trench structure and extends through the first isolation pattern, creating a nested configuration where the second pattern fills the trench space while the first pattern provides sidewall coverage. This nesting ensures complete trench filling with the second pattern while the first pattern remains intact, achieving both ease of manufacture and manufacturing precision.

Inventive Principle:
Principle #7Nested doll (Nesting)

Data Source

PatentUS12284827B2Semiconductor devices
Publication Date: 2025.04.22 SAMSUNG ELECTRONICS CO LTD
  • US12284827B2 patent drawing
  • US12284827B2 patent drawing
  • US12284827B2 patent drawing

AI summary

A semiconductor device includes active fins on a substrate, a first isolation pattern on the substrate, the first isolation pattern extending on a lower sidewall of each of the active fins, a third isolation pattern including an upper portion extending into the first isolation pattern and a lower portion extending into an upper portion of the substrate, the lower portion contacting the upper portion of the third isolation pattern, and having a lower surface with a width greater than that of an upper surface thereof, and a second isolation pattern extending in the substrate under the third isolation pattern, contacting the third isolation pattern, and having a rounded lower surface.