Fin-Shaped Structure Ladder Profile Formation
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Solution Overview
Problem
The increasing miniaturization of semiconductor devices requires tailored fin-shaped structures with specific electrical properties for different areas, such as logic and input/output regions, which existing technologies struggle to achieve effectively due to limitations in controlling channel regions and current between source and drain.
Innovation Solution
A method of forming fin-shaped structures with ladder-shaped cross-sectional profiles in specific areas, allowing for the creation of transistors with varying heights and critical dimensions to meet unique electrical demands by selectively modifying and removing external surfaces of fin-shaped structures using high-selectivity processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If fin-shaped structures with uniform structure are formed across all areas, then manufacturing process is simple, but electrical performance requirements for different areas (logic vs input/output) cannot be met
Solution Approach 1:
The patent applies local quality by creating different fin-shaped structure configurations in different areas. Specifically, first fin-shaped structures are formed in logic areas with one configuration, while second fin-shaped structures are formed in input/output areas with a different configuration (including ladder-shaped cross-sectional profiles). This allows each area to have structures optimized for its specific electrical performance requirements without requiring complex global restructuring.
Solution Approach 2:
The substrate is segmented into different areas (logic areas and input/output areas), and fin-shaped structures are independently configured in each segment. This segmentation enables tailored electrical characteristics for each area while maintaining a relatively simple overall manufacturing process that treats different areas differently only where necessary.
2Reliability
If gate and substrate overlapping area is increased to reduce short channel effect, then channel control is improved, but device area and complexity increase
Solution Approach 1:
The patent employs ladder-shaped cross-sectional profiles for second fin-shaped structures in input/output areas, which extend the gate structure in multiple dimensions. This creates increased overlapping area between gate and substrate without simply scaling up the device footprint, thereby improving channel control while managing structural complexity through efficient spatial utilization.
Solution Approach 2:
The ladder-shaped cross-sectional profile effectively nests multiple gate segments around the fin structure, creating increased gate-substrate overlapping area in a compact configuration. This nested arrangement improves channel control by enhancing electric field coverage while avoiding excessive device area expansion.
Data Source
AI summary
A fin-shaped structure includes a substrate having a first fin-shaped structure located in a first area and a second fin-shaped structure located in a second area, wherein the second fin-shaped structure includes a ladder-shaped cross-sectional profile part. The present invention also provides two methods of forming this fin-shaped structure. In one case, a substrate having a first fin-shaped structure and a second fin-shaped structure is provided. A treatment process is performed to modify an external surface of the top of the second fin-shaped structure, thereby forming a modified part. A removing process is performed to remove the modified part through a high removing selectivity to the first fin-shaped structure and the second fin-shaped structure, and the modified part, thereby the second fin-shaped structure having a ladder-shaped cross-sectional profile part is formed.