Fin and Mesa Transistor Integration Across Mixed Voltage Nodes

Solution Overview

Problem

Existing technologies struggle to integrate multiple types of transistors, such as core, low-voltage, medium-voltage, and high-voltage transistors, on a single semiconductor substrate, as FinFETs are not suitable for medium- and high-voltage applications.

Innovation Solution

The integration process forms semiconductor fins for core and low-voltage transistors, and mesa structures for medium- and high-voltage transistors on a shared substrate, using dielectric plugs or polysilicon plugs in the gates of medium- and high-voltage transistors, and forming dummy strips on Shallow Trench Isolation regions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If FinFETs are used for core and low-voltage transistors, then device performance and speed are improved, but they cannot be used for medium- and high-voltage transistors

Engineering Contradiction:

Improvedevice performanceVSAvoidvoltage range applicability

Core Design Contradiction:

SpeedVSAdaptability or versatility

Solution Approach 1:

The substrate is divided into multiple device regions (first device region for FinFETs, second device region for planar transistors) where each region is optimized for specific voltage requirements. FinFETs are used in the first region for core and low-voltage applications, while planar transistors are used in the second region for medium- and high-voltage applications, allowing each transistor type to operate in its optimal voltage range

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different transistor structures are implemented in different spatial locations on the same substrate. The first device region contains FinFETs with vertically oriented channels optimized for high performance at low voltage, while the second device region contains planar transistors with laterally oriented channels optimized for high voltage operation, giving each region locally optimized properties for its intended function

Inventive Principle:

Principle #3Local quality

2Adaptability or versatility

If multiple types of transistors are integrated on a single substrate, then circuit functionality is improved, but manufacturing complexity increases

Engineering Contradiction:

Improvecircuit functionalityVSAvoidmanufacturing complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

A unified manufacturing process is developed that can produce both FinFETs and planar transistors using the same fabrication steps and equipment. The process includes forming both vertically oriented FinFET structures and laterally oriented planar transistor structures through common process modules, reducing the need for separate manufacturing lines and simplifying production

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The manufacturing processes for FinFETs and planar transistors are merged into a single integrated fabrication sequence. Common process steps such as substrate preparation, isolation formation, doping, and metallization are combined and executed in a unified manner, allowing both transistor types to be manufactured simultaneously on the same substrate through a single process flow

Inventive Principle:

Principle #5Merging (Combining)

3Ease of manufacture

If FinFETs are used exclusively, then manufacturing simplicity is maintained, but medium- and high-voltage transistor requirements cannot be met

Engineering Contradiction:

Improvemanufacturing simplicityVSAvoidvoltage range suitability

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The substrate is divided into multiple device regions (first device region for FinFETs, second device region for planar transistors) where each region is optimized for specific voltage requirements. FinFETs are used in the first region for core and low-voltage applications, while planar transistors are used in the second region for medium- and high-voltage applications, allowing each transistor type to operate in its optimal voltage range

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

A unified manufacturing process is developed that can produce both FinFETs and planar transistors using the same fabrication steps and equipment. The process includes forming both vertically oriented FinFET structures and laterally oriented planar transistor structures through common process modules, reducing the need for separate manufacturing lines and simplifying production

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS12283595B2Integration of multiple transistors having fin and mesa structures

Publication Date: 2025.04.22 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A structure includes a bulk semiconductor substrate, a first plurality of dielectric isolation regions over the bulk semiconductor substrate, a plurality of semiconductor fins protruding higher than the first plurality of dielectric isolation regions, a first gate stack on top surfaces and sidewalls of the plurality of semiconductor fins, a second plurality of dielectric isolation regions over the bulk semiconductor substrate, a mesa structure in the second plurality of dielectric isolation regions, and a second gate stack over the mesa structure. Top surfaces of the first gate stack and the second gate stack are coplanar with each other.