Fin PNBTFET Structure for Steep Subthreshold Switching

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Solution Overview

Problem

Conventional PN-body-tied field effect transistors (PNBTFETs) have limitations due to their large footprint and high manufacturing costs, which hinder their adoption in commercial devices, and they do not achieve sufficient switching speed or low power consumption.

Innovation Solution

The development of PNBTFETs with a fin structure that includes a channel region, an intermediate region, and a contact region with specific doping types, where the gate wraps around the channel region, allowing for efficient and cost-effective manufacturing, achieving a steeper subthreshold slope and reduced power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If conventional PNBTFET structures are used, then switching speed is improved, but footprint area and manufacturing cost increase

Engineering Contradiction:
Improveswitching speedVSAvoidfootprint area
Core Design Contradiction:
SpeedVSArea of stationary object

Solution Approach 1:

The transistor structure is segmented into distinct doped regions (source region with first doping type, drain region with second doping type opposite to first, and channel region between them). This segmentation allows optimization of each region's function while maintaining compact overall dimensions, enabling steep subthreshold slope performance without requiring large footprint area.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the transistor are assigned different local properties through selective doping: the source and drain regions have opposite doping types to create the necessary electric field gradients, while the channel region has appropriate doping to control carrier flow. This local quality differentiation enables high switching speed in a compact structure.

Inventive Principle:
Principle #3Local quality

2Speed

If conventional PNBTFET structures are used, then switching speed is improved, but manufacturing cost increases

Engineering Contradiction:
Improveswitching speedVSAvoidmanufacturing cost
Core Design Contradiction:
SpeedVSEase of manufacture

Solution Approach 1:

The manufacturing process is segmented into standard semiconductor fabrication steps including selective doping of source, drain, and channel regions. By dividing the device into manageable regions that can be processed using conventional techniques, the structure achieves high switching speed without requiring expensive specialized manufacturing operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention uses standard doping parameters and material compositions that are compatible with existing semiconductor manufacturing processes. By controlling doping types and concentrations in different regions using conventional methods, the transistor achieves superior switching performance without increasing manufacturing complexity or cost.

Inventive Principle:
Principle #35Parameter changes

3Loss of energy

If conventional transistor structures are used, then power consumption is high, but subthreshold slope is less steep

Engineering Contradiction:
Improvepower consumptionVSAvoidsubthreshold slope
Core Design Contradiction:
Loss of energyVSSpeed

Solution Approach 1:

The transistor is divided into source region (first doping type), drain region (opposite second doping type), and channel region, with each segment optimized for its specific function. This segmentation creates favorable electric field distributions that produce steep subthreshold slope, enabling the transistor to switch more efficiently and reduce power consumption while maintaining fast switching characteristics.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each region has locally optimized doping characteristics: the source and drain regions have opposite doping types to create strong field effects at interfaces, while the channel region is doped to control threshold voltage and subthreshold behavior. This local quality optimization achieves both steep subthreshold slope and low power consumption simultaneously.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12051723B2PN-body-tied field effect transistors
Publication Date: 2024.07.30 INTEL CORP
  • US12051723B2 patent drawing
  • US12051723B2 patent drawing
  • US12051723B2 patent drawing

AI summary

Disclosed herein are PN-body-tied field effect transistors (PNBTFETs), as well as related devices and methods. In some embodiments, an integrated circuit (IC) structure may include: a fin including a channel region, a contact region, and an intermediate region between the contact region and the channel region, wherein the channel region includes a dopant of a first type, the intermediate region includes a dopant of a second type different from the first type, and the contact region includes a dopant of the first type; a gate that at least partially wraps around the channel region; and a conductive contact in contact with the contact region.