Modified Source/Drain Recess Profile in Scaled Fin Structures

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Solution Overview

Problem

Existing semiconductor manufacturing processes are inadequate for effectively miniaturizing device sizes on a chip, leading to unsatisfactory performance as device scaling-down continues, particularly in controlling the profile of recesses for source/drain structures, which affects the performance of semiconductor devices.

Innovation Solution

A method involving the formation of a gate structure over a substrate, followed by the creation of recesses using two etching processes, with doped regions formed and partially removed to create modified recesses with a wider bottom width, allowing for improved control of the source/drain structure profile and performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If device scaling-down continues to miniaturize device sizes on a chip, then integration levels increase, but manufacturing precision and control over recess profiles deteriorate

Engineering Contradiction:
Improveintegration levelsVSAvoidrecess profile control
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The etching process is divided into two separate sequential etching processes instead of one single process. The first etching process forms an initial recess, and the second etching process modifies it to create the final recess with the desired wider bottom profile. This segmentation allows independent optimization of each etching step to achieve both miniaturization and precise profile control.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The first etching process performs a preliminary action by forming an initial recess structure that serves as a foundation for the second etching process. This preliminary recess is then modified by the second etching process to achieve the final desired profile with wider bottom width, allowing the channel region to be positioned closer to the source/drain structures.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If recess width at the bottom is reduced to bring source/drain structures closer to channel region, then current efficiency improves, but manufacturing precision and control over recess shape deteriorate

Engineering Contradiction:
Improvecurrent efficiencyVSAvoidrecess shape control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The recess formation is segmented into two etching processes where the first creates an initial recess and the second modifies it to achieve the wider bottom profile. This allows precise control over the final recess shape while maintaining the ability to position the channel region close to the source/drain structures for improved current efficiency.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the parameters of the etching processes, specifically using different etching conditions in the first and second processes to achieve the desired wider bottom recess profile. By adjusting etching parameters such as etchant composition, temperature, and duration, precise control over the recess shape is achieved while maintaining current efficiency.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the current efficiency of semiconductor structures by ensuring the source/drain structures are closer to the channel region, improving performance and reducing issues like short channel effects and drain-induced barrier lowering.

Implementation Method 1

the creation of recesses using two etching processes

Methodology Applied
Scientific EffectEtching:

Implementation Method 2

doped regions formed and partially removed

Methodology Applied
Scientific EffectDoping: Dopants

Data Source

PatentUS20240234548A1Method for manufacturing semiconductor structure with source/drain structure having modified shape
Publication Date: 2024.07.11 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240234548A1 patent drawing
  • US20240234548A1 patent drawing
  • US20240234548A1 patent drawing

AI summary

Semiconductor structures and method for forming the same are provide. The method includes forming a fin structure extending in a first direction over a substrate and forming spacers on sidewalls of the fin structure to laterally sandwiched the fin structure in a second direction. The method further includes etching the fin structure in a third direction to form a recess between the spacers and forming a doped region in the fin structure exposed by the recess. The method further includes removing an upper portion of the doped region and annealing a bottom portion of the doped region after removing the upper portion of the doped region. The method further includes forming a source/drain structure over the bottom portion of the doped region.