Fin-Shaped Group III Nitride Structure for Normally-Closed Power Devices
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Solution Overview
Problem
Existing semiconductor devices, particularly Group III nitride semiconductors, are mainly lateral and normally-open, leading to low integration levels per unit area and energy inefficiency, as they require constant power to maintain a conducting state, whereas many applications necessitate normally-closed devices for energy savings.
Innovation Solution
A fin-shaped semiconductor device structure is developed, featuring a substrate with a stepped structure and epitaxially grown nitride semiconductor layers, including a P-type buried layer and two-dimensional electron or hole gases, which allows for a normally-closed state and improved integration density through the formation of a body diode and gate dielectric layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If lateral device structure is used, then device fabrication is simpler, but integration level per unit area is not high enough
Solution Approach 1:
The patent transitions from lateral device structure to vertical fin-shaped structure, changing the current flow direction from horizontal to vertical. This dimensional change increases the integration level per unit area by utilizing the vertical dimension for current conduction, allowing higher device density without increasing footprint area.
Solution Approach 2:
The device is segmented into distinct functional layers including source region, drain region, gate structure, and fin-shaped channel region. This segmentation allows independent optimization of each region and enables higher integration density through systematic arrangement of multiple devices in vertical stacking.
2Use of energy by moving object
If normally-open device is used, then device structure is simpler, but energy consumption increases due to constant conducting state
Solution Approach 1:
The patent inverts the default state of the device from normally-open to normally-closed by introducing a body diode structure. The body diode, formed between the source region and substrate, ensures the device remains off by default and only conducts when explicitly activated, thereby reducing energy consumption in standby states while maintaining controlled operation when needed.
3Productivity
If vertical fin-shaped structure is used, then integration level increases, but gate leakage current increases
Solution Approach 1:
The patent introduces a gate dielectric layer as an intermediary between the gate electrode and the fin-shaped channel region. This dielectric layer acts as a mediator that blocks direct current leakage while still allowing electric field coupling for device control, thereby reducing gate leakage current in vertical fin-shaped structures while maintaining their high integration benefits.
Solution Approach 2:
The gate dielectric layer is specifically positioned at the gate-channel interface where leakage occurs, providing localized insulation exactly where needed. This local quality enhancement targets the specific problem area without requiring changes to the overall vertical fin-shaped structure, maintaining high integration while reducing leakage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The fin-shaped semiconductor device achieves a higher integration level, reduced gate leakage current, stable threshold voltage, and energy-saving capabilities by enabling a normally-closed state, enhancing both power handling and reliability.
Implementation Method 1
laterally epitaxially growing a fin-shaped nitride semiconductor layer upwardly using the third surface as a core, being limited by the second plane, and being perpendicular to the second plane
Implementation Method 2
forming a first compound semiconductor layer (130) on the nitride semiconductor layer, so as to simultaneously form, at an interface between the first compound semiconductor layer (130) and the nitride semiconductor layer, a two-dimensional hole gas and immovable background negative charges
Implementation Method 3
forming a first compound semiconductor layer (130) on the nitride semiconductor layer, so as to simultaneously form, at an interface between the first compound semiconductor layer (130) and the nitride semiconductor layer, a two-dimensional hole gas and immovable background negative charges; and/or a two-dimensional electron gas and immovable background positive charges
Data Source
AI summary
A semiconductor device and a method of fabricating the same are proposed. The semiconductor device includes a plurality of hole-channel Group III nitride devices and a plurality of electron-channel Group III nitride devices. In the above, the hole-channel Group III nitride devices and the electron-channel Group III nitride devices are arranged in correspondence with each other. The electron-channel Group III nitride device has a fin-shaped channel, and a two-dimensional hole gas and/or a two-dimensional electron gas can be simultaneously formed at an interface between a compound semiconductor layer and a nitride semiconductor layer.