Fin End Spacer Dummy Gate for Overlay-Shifted FinFET Source/Drain Protection
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Solution Overview
Problem
During the manufacturing process of semiconductor FinFET devices, overlay shift can cause misalignment of structures, leading to the formation of narrow gaps adjacent to fin ends. These gaps prevent the complete formation of protective layers, resulting in defects such as damaged or chemically altered source/drain epitaxial layers.
Innovation Solution
The implementation of a spacer dummy gate structure, which includes forming sidewall spacer layers on dummy structures and using a spacer dummy gate cap to preserve the source/drain epitaxial layers during etching processes. This ensures that the source/drain epitaxial layers are protected even when overlay shift occurs and the spacer layers are not fully formed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional manufacturing processes are used without spacer dummy gate, then the manufacturing process is simpler, but overlay shift causes misalignment and narrow gaps that damage source/drain epitaxial layers
Solution Approach 1:
The spacer dummy gate structure is formed in advance before the source/drain epitaxial layer formation. This preliminary structure serves as a protective placeholder that prevents misalignment damage during subsequent manufacturing steps, ensuring the epitaxial layers are not damaged by overlay shift even though the overall process complexity increases
Solution Approach 2:
The spacer dummy gate acts as an intermediary protective element between the manufacturing process alignment variations and the source/drain epitaxial layers. This intermediate structure absorbs the misalignment stress and prevents direct damage to the critical epitaxial layers, thereby improving reliability despite adding process steps
2Reliability
If spacer dummy gate structure is implemented, then source/drain epitaxial layers are protected from overlay shift damage, but the manufacturing process becomes more complex
Solution Approach 1:
The gate structure is segmented into multiple components: the actual gate electrode and the spacer dummy gate structure. This segmentation allows the dummy gate to be formed separately as a protective element that can be precisely positioned to prevent overlay shift damage, improving reliability while managing manufacturing complexity through modular construction
Solution Approach 2:
The spacer dummy gate is specifically positioned at critical locations where overlay shift would cause damage to source/drain epitaxial layers. This localized protection approach targets only the vulnerable areas rather than protecting the entire structure uniformly, thereby improving reliability at the critical points while minimizing the overall manufacturing complexity
Data Source
AI summary
A semiconductor device includes a first fin and a second fin in a first direction and aligned in the first direction over a substrate, an isolation insulating layer disposed around lower portions of the first and second fins, a first gate electrode extending in a second direction crossing the first direction and a spacer dummy gate layer, and a source/drain epitaxial layer in a source/drain space in the first fin. The source/drain epitaxial layer is adjacent to the first gate electrode and the spacer dummy gate layer with gate sidewall spacers disposed therebetween, and the spacer dummy gate layer includes one selected from the group consisting of silicon nitride, silicon oxynitride, silicon carbon nitride, and silicon carbon oxynitride.