Fin-Shaped Semiconductor Structures Using Sidewall Image Transfer

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Solution Overview

Problem

Current methods for fabricating fin field effect transistors (Fin FETs) face challenges in precisely defining fin structures and controlling etching processes, leading to issues like fin collapse and over-etching due to limitations in mask and lithography techniques, which affect the efficiency of miniaturized semiconductor devices.

Innovation Solution

A method involving the formation of fin-shaped structures using a substrate with a first semiconductor layer, an insulating layer, and a second semiconductor layer, where a patterned mask is used to create openings, and a sidewall image transfer process with mandrels and spacers is employed to pattern the layers, allowing for precise formation of fin-shaped structures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If traditional mask and lithography techniques are used to form fin structures, then the fabrication process is simpler, but the precision of fin position definition and etching control deteriorates, leading to fin collapse or over-etching

Engineering Contradiction:
Improvefin position definition precisionVSAvoidfabrication process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The fabrication process is divided into multiple stages: first forming mandrels with initial patterns, then forming spacers on the mandrels, and finally using the spacers as masks for etching the fin structures. This segmentation allows each stage to contribute to the overall precision without requiring the entire process to be overly complex

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Mandrels are formed in advance with patterns that are larger than the final fin structures. These mandrels serve as preliminary structures that guide the subsequent spacer formation and etching processes, ensuring precise fin positioning before the actual fin formation occurs

Inventive Principle:
Principle #10Preliminary action

2Productivity

If the width of fins and pitch between fins are shrunk for miniaturization, then the device density increases, but the control of etching time and precision deteriorates, causing fin collapse or over-etching

Engineering Contradiction:
Improvedevice densityVSAvoidetching control precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

Spacers are introduced as intermediary structures between the mandrels and the final fin structures. The spacers provide a controlled mechanism for transferring the pattern from mandrels to fins, allowing precise control of fin width and pitch through spacer thickness rather than direct etching control

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The spacer formation process creates a copy of the mandrel pattern at a reduced scale. The spacer width determines the final fin dimensions, allowing the fin pitch and width to be precisely controlled by the spacer thickness rather than by direct lithography or etching parameters

Inventive Principle:
Principle #26Copying

Data Source

PatentUS20240395909A1Semiconductor device and method for fabricating the same
Publication Date: 2024.11.28 UNITED MICROELECTRONICS CORP
  • US20240395909A1 patent drawing
  • US20240395909A1 patent drawing
  • US20240395909A1 patent drawing

AI summary

A method for fabricating semiconductor device includes: forming a first semiconductor layer and an insulating layer on a substrate; removing the insulating layer and the first semiconductor layer to form openings; forming a second semiconductor layer in the openings; and patterning the second semiconductor layer, the insulating layer, and the first semiconductor layer to form fin-shaped structures.