Fin-Type Transistor Fabrication with Conformal Active Layers
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Solution Overview
Problem
Current methods for fabricating semiconductor devices face challenges in achieving improved performance while maintaining a simplified process, particularly in forming fin-type transistors with small pitches and varying semiconductor materials.
Innovation Solution
The method involves forming fin-type transistors by etching a base to create protruding fins, followed by conformally depositing active layers with different semiconductor materials, removing portions to expose surfaces, and forming gate insulation and gate electrodes, allowing for the use of isolation layers to separate and insulate the active fins, thereby enhancing performance and simplifying the fabrication process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional fabrication methods are used to form fin-type transistors with small pitches, then manufacturing complexity increases, but device performance and integration density improve
Solution Approach 1:
The fabrication process is divided into distinct stages: forming sacrificial fins, depositing active layers, selectively removing portions, and forming isolation layers. This segmentation allows each step to be optimized independently, managing manufacturing complexity while achieving high integration density through systematic progression
Solution Approach 2:
Sacrificial fins are formed in advance before the active fins are created. This preliminary structure serves as a template that guides subsequent material deposition and removal processes, enabling precise formation of small-pitch transistors without increasing overall manufacturing complexity
2Reliability
If multiple semiconductor materials are used in active layers, then device performance improves, but process complexity increases
Solution Approach 1:
Different semiconductor materials are deposited in specific regions corresponding to different transistor types (n-type and p-type). This local differentiation allows optimization of device performance for each transistor type while maintaining a unified fabrication process, preventing overall process complexity from escalating
Solution Approach 2:
The patent varies material composition parameters across different active layers (e.g., InP, InGaAs, InAlAs with different indium contents) to optimize device performance. These parameter changes are implemented through controlled deposition processes that maintain processability despite material diversity
3Manufacturing precision
If active layers are conformally deposited on fins, then manufacturing precision improves, but material usage increases
Solution Approach 1:
Portions of the conformally deposited active layers are selectively removed to expose fin top surfaces. This extraction creates the desired transistor structure with precise material placement while eliminating excess material that would otherwise be wasted, balancing manufacturing precision with material efficiency
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the creation of semiconductor devices with improved performance and reduced size, allowing for reliable formation of transistors with small pitches and varying semiconductor materials, while simplifying the fabrication process.
Implementation Method 1
forming a fin upwardly protruding from a base including a first semiconductor material, by etching the base
Implementation Method 2
conformally forming an active layer including a second semiconductor material different from the first semiconductor material, on the fin
Data Source
AI summary
Methods of forming a semiconductor device are provided. A method of forming a semiconductor device includes forming a semiconductor layer on a fin, where the fin and the semiconductor layer include first and second semiconductor materials, respectively. Moreover, the method includes defining first and second active fins that include the second semiconductor material, by removing at least a portion of the fin. Related semiconductor devices are also provided.