Fin-like Transistor Dummy Gate for Strained Epitaxy

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In the integrated circuit industry, epitaxy growth for strained semiconductor structures is hindered by facet defects formed during the formation of fin-like active regions, which constrain further growth and affect circuit performance.

Innovation Solution

A semiconductor structure and method that includes forming fin-like active regions with a dummy gate stack extending over the end portions, allowing epitaxy growth to occur without exposing dielectric isolation features, thus eliminating facet defects by offsetting recesses from isolation features and enabling strain-enhanced epitaxy features to be grown on semiconductor surfaces.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If epitaxy growth is performed to form strained semiconductor structures, then carrier mobility is increased and circuit performance is enhanced, but facet defects are formed that constrain further epitaxy growth

Engineering Contradiction:
Improvecircuit performanceVSAvoidfacet defects
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

A dummy gate stack is formed over the isolation feature and line end portions of the active region before epitaxy growth. This preliminary structure prevents facet defects from forming at the line ends during subsequent epitaxy processes, allowing strain-enhanced growth to proceed without interruption while maintaining circuit performance

Inventive Principle:
Principle #10Preliminary action

2Ease of manufacture

If fin-like active regions are formed with standard gate structures, then device fabrication is simplified, but void defects occur at line end portions due to exposed dielectric isolation features

Engineering Contradiction:
Improvefabrication simplicityVSAvoidvoid defects
Core Design Contradiction:
Ease of manufactureVSObject-generated harmful factors

Solution Approach 1:

The dummy gate stack serves as an intermediary structure between the isolation feature and the active region line ends. It fills the space that would otherwise expose dielectric isolation features, preventing void defect formation during epitaxy growth while maintaining fabrication simplicity through integration with standard gate formation processes

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively eliminates facet defects and enhances carrier mobility, improving circuit performance by allowing strain-enhanced epitaxy growth without void defects, thereby improving the integrity and efficiency of fin-like field effect transistors.

Implementation Method 1

Epitaxy growth is a step implemented to form the strained structure

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Implementation Method 2

strained semiconductor structures are used to increase the carrier mobility in the channel and enhance circuit performance

Methodology Applied
Scientific EffectStrain enhancement:

Data Source

PatentUS9917192B2Structure and method for transistors with line end extension
Publication Date: 2018.03.13 MOSAID TECH
  • US9917192B2 patent drawing
  • US9917192B2 patent drawing
  • US9917192B2 patent drawing

AI summary

A method includes forming an isolation feature in a semiconductor substrate; forming a first fin-like active region and a second fin-like active region in the semiconductor substrate and interposed by the isolation feature; forming a dummy gate stack on the isolation feature, wherein the dummy gate extends to the first fin-like active region from one side and to the second fin-like active region from another side.