Fin Structure Epitaxial Growth Trench Isolation

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Solution Overview

Problem

In semiconductor devices, adjacent epitaxial structures often generate unwanted lattice defects at their interfaces, which negatively impact device performance.

Innovation Solution

A method is developed where a photoresist layer is used to adjust the height difference between fin structures and insulating layers, creating a trench for epitaxial layer growth, preventing contact between adjacent epitaxial layers and enhancing manufacturing yield.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If epitaxial structures are formed in adjacent regions, then carrier mobility is improved through lattice strain, but lattice defects are generated at the interfaces between adjacent epitaxial structures

Engineering Contradiction:
Improvedevice performanceVSAvoidlattice defects
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent introduces a trench structure that segments the semiconductor device into isolated regions. The epitaxial structures are formed in separate trenches rather than adjacent regions, physically dividing them to prevent interface defect formation while maintaining the strain effect within each isolated epitaxial structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The trench acts as an intermediary barrier between adjacent epitaxial structures. By introducing this intermediate region, the patent prevents direct contact between epitaxial structures that would otherwise generate lattice defects at their interfaces, while still allowing each epitaxial structure to provide its strain effect independently.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If the top surface of fin structure is higher than the top surface of insulating layer, then epitaxial layer formation is simplified, but adjacent epitaxial layers are more likely to contact each other

Engineering Contradiction:
Improveepitaxial layer formationVSAvoidmanufacturing yield
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent changes the geometric relationship between fin structures and insulating layers by creating trenches that extend vertically. This dimensional change allows the epitaxial structures to be confined within the trench boundaries, preventing lateral contact between adjacent structures while still enabling epitaxial layer formation on the fin structures.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent applies different height relationships locally: within each trench, the fin structure top surface is higher than the insulating layer to facilitate epitaxial formation, but the trench walls provide local confinement that prevents adjacent epitaxial structures from contacting each other. This local quality differentiation resolves the contradiction between ease of manufacture and reliability.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces the occurrence of epitaxial layer contact with adjacent layers, thereby minimizing lattice defects and improving semiconductor device performance.

Implementation Method 1

a photoresist layer is used to adjust the height difference between fin structures and insulating layers

Methodology Applied
Scientific EffectPhotoresist layer removal:

Implementation Method 2

an epitaxial layer is then formed on the top surface of each remained fin structure

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentUS9312180B2Method for forming semiconductor structure
Publication Date: 2016.04.12 UNITED MICROELECTRONICS CORP
  • US9312180B2 patent drawing
  • US9312180B2 patent drawing
  • US9312180B2 patent drawing

AI summary

The present invention provides a method for forming a semiconductor structure, including the following steps: Firstly, a substrate is provided, the substrate has a first region defined thereon, a plurality of fin structure is disposed within the first region, and an insulating layer is disposed on the substrate and between each fin structure; next, a first material layer is then formed on the insulating layer, and the fin structures is exposed simultaneously, afterwards, the fin structure is partially removed, and an epitaxial layer is then formed on the top surface of each remained fin structure.