Fin-Type Semiconductor Device Leakage Current Reduction
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Solution Overview
Problem
Current semiconductor devices face challenges in reducing leakage current and enhancing device operation performance and reliability, particularly in multigate transistors with fin-type patterns, where the electric potential of the channel region is influenced by drain voltage, leading to short channel effects.
Innovation Solution
The semiconductor device incorporates a fin-type pattern with specific trench and field insulating film configurations, including portions of different heights and dummy gates positioned on these films, which intersect and overlap the fin-type pattern to minimize leakage current. This configuration includes a first field insulating film with a first portion and a second portion of varying heights, and a second field insulating film with a third portion, along with dummy gates on these films, to optimize the overlap area and reduce leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a multigate transistor with fin-type pattern is used for density enhancement, then device density is improved, but leakage current increases
Solution Approach 1:
The field insulating film is segmented into multiple portions with different heights (first portion, second portion, third portion) along the channel length direction. This segmentation allows different regions of the fin-type pattern to have different degrees of gate overlap, thereby reducing leakage current in specific regions while maintaining high device density.
Solution Approach 2:
Different portions of the field insulating film have different heights, creating local variations in the overlap area between the gate and fin-type pattern. The first portion has a greater height than the second portion, which has a greater height than the third portion, allowing localized control of electrical characteristics to reduce leakage current.
2Reliability
If gate length is increased to enhance current control capability, then current control is improved, but device scaling is hindered
Solution Approach 1:
Instead of controlling current solely through gate length in one dimension, the invention introduces vertical dimension control by varying the height of field insulating film portions. This creates additional control dimensions for current management without requiring increased gate length.
3Ease of manufacture
If conventional field insulating film configuration is used, then manufacturing is simplified, but leakage current cannot be effectively reduced
Solution Approach 1:
The field insulating film is formed with predetermined height variations (first portion, second portion, third portion with decreasing heights) before gate formation. This preliminary structuring enables subsequent gate patterns to have optimized overlap areas with the fin-type pattern, reducing leakage current while maintaining manufacturing feasibility through sequential processing steps.
Data Source
AI summary
A semiconductor device includes a fin-type pattern including a first short side and a second short side opposed to each other, a first trench in contact with the first short side, a second trench in contact with the second short side, a first field insulating film in the first trench, the first field insulating film including a first portion and a second portion arranged sequentially from the first short side, and a height of the first portion being different from a height of the second portion, a second field insulating film in the second trench, and a first dummy gate on the first portion of the first field insulating film.