Fin-Type Semiconductor Device With Asymmetrical Epitaxial Layers
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Solution Overview
Problem
Current semiconductor devices face challenges in scaling integration density and controlling current without increasing gate length, while also managing the short channel effect effectively.
Innovation Solution
A semiconductor device design featuring a fin-type pattern on a substrate with a field insulating film and an epitaxial pattern, where the epitaxial pattern has asymmetrical layers with varying concentrations of materials, applied to improve carrier mobility and prevent etching damage, and includes a specific structure with inclined surfaces forming a diamond shape to enhance reliability and reduce electrical resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a multi-gate transistor with fin-shape silicon body is used to increase integration density, then scaling capability is improved, but manufacturing precision becomes more difficult to control
Solution Approach 1:
The patent applies preliminary action by forming the field insulating film at the sidewalls of the fin structure before completing the epitaxial layer formation. This pre-positioned insulating film serves as a protective barrier that prevents etching damage to the fin structure during subsequent manufacturing processes, thereby maintaining manufacturing precision while enabling continued scaling for high integration density.
Solution Approach 2:
The field insulating film acts as a cushioning protective layer placed beforehand at the sidewalls of the fin structure. This film prevents direct exposure of the fin structure to etching processes, thereby cushioning against potential damage and maintaining structural integrity during device fabrication, which is critical for achieving high integration density without sacrificing precision.
2Ease of operation
If gate length is increased to control current, then current control capability is improved, but device scaling is limited
Solution Approach 1:
The patent introduces asymmetry by forming the field insulating film at the sidewalls of the fin structure, creating an asymmetric protective configuration. This asymmetric structure enhances current control capability by modifying the electric field distribution in the channel region, allowing for improved current control without increasing gate length, thereby maintaining device scalability.
3Ease of manufacture
If conventional symmetrical epitaxial structure is used, then manufacturing is simpler, but device reliability is reduced due to contact failure
Solution Approach 1:
The patent applies asymmetry by forming the field insulating film at the sidewalls of the fin structure, creating an asymmetric configuration that prevents contact failure. This asymmetric protective structure ensures reliable electrical contact by preventing etching damage to the fin structure, thereby improving device reliability while maintaining reasonable manufacturing complexity through the use of standard epitaxial processes.
Data Source
AI summary
A semiconductor device is provided. The semiconductor device includes a fin-type pattern formed on a substrate and including first and second sidewalls, which are defined by a trench, a field insulating film placed in contact with the first and second sidewalls and filling the trench, and an epitaxial pattern formed on the fin-type pattern and including a first epitaxial layer and a second epitaxial layer, which is formed on the first epitaxial layer.