Fin-Type Semiconductor Device With Segmented Field Insulating Films
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Solution Overview
Problem
Current semiconductor devices face challenges in scaling down multigate transistors while maintaining performance and suppressing short channel effects, as existing technologies struggle to effectively manage the complexity of gate structures and insulating films.
Innovation Solution
The semiconductor device employs a unique structure with multiple fin-type patterns and insulating films, where the second field insulating film has a higher upper surface than the first, and a third field insulating film is used to fill deep trenches, allowing for simultaneous etching to create distinct heights and reduce parasitic capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple field insulating films with different heights are used, then parasitic capacitance is reduced and AC performance is improved, but device structure and manufacturing process become more complex
Solution Approach 1:
The field insulating film is divided into multiple segments (first field insulating film and second field insulating film) with different heights. The first field insulating film is formed in the shallow trench, and the second field insulating film is formed in the deep trench that penetrates through the first field insulating film. This segmentation allows different regions to have optimized insulation heights, reducing parasitic capacitance while maintaining manufacturability through sequential formation processes.
Solution Approach 2:
Different regions of the field insulating film structure are given different heights to match local requirements. The second field insulating film extends higher than the first field insulating film in the deep trench region, providing enhanced insulation where needed. This local quality optimization reduces parasitic capacitance between adjacent fins while avoiding unnecessary complexity in regions where standard insulation suffices.
2Reliability
If deep trenches are formed to improve insulation, then parasitic capacitance is reduced, but air gaps may form and filling becomes difficult
Solution Approach 1:
The first field insulating film is formed in the shallow trench before the deep trench is etched. This preliminary action provides a foundation layer that prevents air gap formation during subsequent deep trench etching and filling processes. The first field insulating film acts as a seed layer that guides the formation of the second field insulating film, ensuring complete and gap-free filling of the deep trench region.
Solution Approach 2:
The second field insulating film is nested within the deep trench that penetrates through the first field insulating film. This nested structure allows the deeper insulation layer to be formed within the context of the shallower layer, ensuring proper alignment and preventing air gaps. The sequential nesting approach simplifies the filling process by providing a pre-formed structural guide.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances AC performance and reliability by reducing the thickness and capacitance of the gate electrode, while preventing air gaps and improving the filling of deep trenches, thereby enhancing the overall performance of the semiconductor device.
Implementation Method 1
reducing the thickness and capacitance of the gate electrode, while preventing air gaps and improving the filling of deep trenches, thereby enhancing the overall performance of the semiconductor device
Implementation Method 2
A first etching process is performed at a first etch rate on the third preliminary field insulating film to form a third field insulating film. A second etching process is performed at a second etch rate on the first and the second preliminary field insulating films to form first and second field insulating films
Data Source
AI summary
A semiconductor device is provided as follows. A first fin-type pattern is disposed on a substrate. A first field insulating film is adjacent to a sidewall of the first fin-type pattern. A second field insulating film is adjacent to a sidewall of the first field insulating film. The first field insulating film is interposed between the first fin-type pattern and the second field insulating film. The second field insulating film comprises a first region and a second region. The first region is closer to the sidewall of the first field insulating film. A height from a bottom of the second field insulating film to an upper surface of the second region is larger than a height from the bottom of the second field insulating film to an upper surface of the first region.


