Fin and Wire Semiconductor Structure for Threshold Voltage Control
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Solution Overview
Problem
Existing semiconductor manufacturing processes are inadequate for effective miniaturization and threshold voltage adjustment as device scaling-down continues, facing challenges in layer thickness and gate formation.
Innovation Solution
A semiconductor structure is formed by creating a wire structure over a fin structure, connected with source/drain structures and embedded in a gate structure, allowing for adjustment of threshold voltage through precise layer thickness control and removal processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If device scaling-down continues to increase integration levels, then higher performance is achieved, but manufacturing precision and tolerance control become inadequate
Solution Approach 1:
The patent divides the gate structure formation into multiple segments: first forming a mandrel structure, then depositing first and second dielectric layers with different etch selectivities, and finally performing selective removal. This segmentation allows each layer to be controlled independently, achieving the required manufacturing precision for scaled-down devices while maintaining high integration levels.
Solution Approach 2:
The patent applies local quality by using dielectric layers with different etch selectivities in different regions of the structure. The first dielectric layer has different etch resistance characteristics compared to the second dielectric layer, allowing selective removal in specific areas to form the gate structure with precise dimensional control at the scaled dimensions.
2Manufacturing precision
If repeated masking processes are used for threshold voltage adjustment, then precise control is achieved, but manufacturing complexity and costs increase
Solution Approach 1:
The patent performs preliminary action by forming the mandrel structure and depositing the dielectric layers before the actual gate patterning step. The selective removal process is designed in advance with specific etch selectivity considerations, allowing threshold voltage adjustment to be built into the structure formation process itself rather than requiring separate masking steps later, thereby reducing manufacturing complexity.
Solution Approach 2:
The patent makes the dielectric layer deposition process multi-functional by using the same deposition steps to create both the structural components and the threshold voltage adjustment features. The first and second dielectric layers serve dual purposes: forming the gate structure geometry and providing the selective etch characteristics needed for threshold voltage control, eliminating the need for separate masking processes.
Data Source
AI summary
A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a substrate and a fin structure formed over the substrate. The semiconductor structure further includes a first wire structure formed over the fin structure and a source structure and a drain structure formed at two opposite sides of the fin structure. The semiconductor structure further includes a gate structure formed over the fin structure. In addition, the fin structure and the first wire structure are separated by the gate structure.