Fine Conductive Pillars for Semiconductor Electrical Connections
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The challenge in semiconductor technology is to maintain and improve the electrical properties of devices with decreasing size while ensuring efficient and damage-free electrical connections and feature construction, particularly in high-resolution applications where existing methods may damage layers and components.
Innovation Solution
The semiconductor device employs fine conductive pillars with diameters no more than 10 μm, formed using a focused ion beam (FIB) or electron beam environment, allowing for precise electrical connections without damaging the device layers, and can be tilted or positioned to connect nodes/lines or replace conventional bumps in flip chip devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If conventional methods are used to establish electrical connections in reduced-size semiconductor devices, then device size can be decreased, but the layers and components may be damaged
Solution Approach 1:
The patent replaces conventional mechanical contact-based electrical connection methods with a beam-based approach (electron beam or ion beam) to form conductive pillars. This substitution allows for precise, non-contact material deposition that avoids mechanical damage to delicate semiconductor layers and components while establishing reliable electrical connections in reduced-size devices
2Measurement precision
If feature size is reduced to improve resolution, then device density increases, but manufacturing precision requirements become more stringent
Solution Approach 1:
The patent employs beam-based deposition (electron or ion beam) instead of conventional mechanical lithography and etching processes. This enables precise control over conductive pillar formation at sub-micron scales, achieving both high resolution and manufacturing precision simultaneously by depositing conductive material layer-by-layer under direct beam control
Solution Approach 2:
The patent utilizes changes in beam parameters (energy, current, scanning patterns) to precisely control the deposition process. By adjusting beam energy and scanning velocity, the system can accurately control pillar diameter, height, and position, achieving the required manufacturing precision for reduced feature sizes
3Manufacturing precision
If conductive pillars with diameter no more than 10 μm are formed, then electrical connection accuracy improves, but manufacturing complexity increases
Solution Approach 1:
The patent replaces complex multi-step mechanical lithography, etching, and deposition processes with a single integrated beam-based direct deposition system. This consolidation simplifies the manufacturing process while achieving the required 10 μm or smaller pillar diameters with high accuracy, reducing both process steps and overall manufacturing complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method provides efficient and accurate electrical connections, enabling size reduction in semiconductor devices while maintaining electrical properties, and allows for the elimination of insulating films, reducing the risk of short-circuits and enabling precise control over pillar configuration for various applications.
Implementation Method 1
forming at least a conductive pillar having a predetermined height on the conductive pattern formed under a focus ion beam (FIB) or an electron beam environment
Implementation Method 2
forming at least a conductive pillar having a predetermined height on the conductive pattern formed under a focus ion beam (FIB) or an electron beam environment
Data Source
AI summary
A semiconductor device and a method of manufacturing the same are provided. A semiconductor device comprises a substrate, a conductive pattern formed on the substrate, and at least a conductive pillar having a predetermined height formed on the conductive pattern. The conductive pillar can be formed under a focus ion beam (FIB) or an electron beam environment. In one embodiment, a diameter of the conductive pillar is no more than 10 μm.