Fine-Grain Polysilicon Deposition for MOSFET Threshold Matching
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Solution Overview
Problem
The stochastic nature of polysilicon grain size during MOSFET fabrication leads to significant threshold voltage mismatches between proximate devices, limiting circuit accuracy and performance.
Innovation Solution
A chemical vapor deposition process using disilane and hydrogen gas is employed to form a polysilicon layer with a mean grain size of 50 nanometers or less, reducing grain boundary channeling paths and dopant diffusion, thereby stabilizing threshold voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If polysilicon grain size is large, then dopant diffusion occurs along grain boundaries causing threshold voltage mismatch, but reducing grain size increases manufacturing complexity
Solution Approach 1:
The patent changes the chemical composition parameters of the polysilicon layer by incorporating nitrogen and carbon elements at controlled concentrations (0.1-5.0 at% nitrogen, 0.1-5.0 at% carbon). This compositional modification fundamentally alters the grain growth behavior and dopant diffusion characteristics, achieving fine grain size and reduced threshold voltage mismatch without requiring extreme manufacturing process complexity
Solution Approach 2:
The patent creates a composite polysilicon material system by introducing nitrogen and carbon elements into the silicon matrix. This composite structure forms a complex interplay between the base silicon and dopant elements, where the dopants preferentially segregate to grain boundaries and form complexes that inhibit harmful dopant diffusion while maintaining electrical functionality
2Reliability
If polysilicon grain size is reduced to 50nm or less, then dopant diffusion and clustering are reduced, but the deposition process becomes more complex
Solution Approach 1:
The patent modifies the deposition parameters by controlling the ratio of disilane to hydrogen gas (5:95 to 20:80), deposition temperature (600-800°C), and pressure conditions to achieve fine grain size and uniform dopant distribution. The nitrogen and carbon incorporation during deposition further modifies grain growth kinetics, enabling reliable dopant activation with reduced diffusion
Solution Approach 2:
The patent uses nitrogen and carbon elements as intermediary substances that mediate between the polysilicon matrix and dopant atoms. These intermediary elements preferentially bind to dopant atoms at grain boundaries, preventing harmful dopant clustering and diffusion while allowing controlled dopant activation in the bulk material
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method significantly reduces threshold voltage variations between matched transistors, improving circuit performance and matching by maintaining uniform grain size throughout the fabrication process.
Implementation Method 1
The polysilicon layer is formed by a chemical vapor deposition process that includes providing a gas flow including disilane and hydrogen gas over the semiconductor substrate
Data Source
AI summary
A system and method for growing fine grain polysilicon. In one example, the method of forming an integrated circuit includes forming a dielectric layer over a semiconductor substrate, and forming a polysilicon layer over the dielectric layer. The polysilicon layer is formed by a chemical vapor deposition process that includes providing a gas flow including disilane and hydrogen gas over the semiconductor substrate.