Fine-Line Wiring Board Copper Plating for Seed-Layer Adhesion

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Solution Overview

Problem

Insufficient adhesion between the seed layer and the copper plating layer occurs when forming fine wirings with widths less than 10 μm, leading to potential collapse of the copper plating layer during etching.

Innovation Solution

A method involving the formation of a copper plating layer with a BP occupancy of 45% or less, determined by calculating the occupancy of black portions in the cross-section of the copper plating layer, using a resist layer composed of specific components and conditions to enhance adhesion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If a copper plating layer with width less than 10 μm is formed on the seed layer by electrolytic plating, then fine wiring with minute width is achieved, but adhesion between the seed layer and copper plating layer becomes insufficient

Engineering Contradiction:
Improvewiring widthVSAvoidadhesion between seed layer and copper plating layer
Core Design Contradiction:
Length of moving objectVSStrength

Solution Approach 1:

The patent applies preliminary action by controlling the formation of the copper plating layer before the etching process. Specifically, the copper plating layer is formed with a BP occupancy of 45% or less through controlled electrolytic plating conditions, ensuring adequate adhesion is established in advance before any potential collapse could occur during subsequent etching operations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent employs parameter changes by adjusting the BP occupancy parameter of the copper plating layer to 45% or less. This parameter control is achieved through modification of electrolytic plating conditions such as current density, plating time, and solution composition, thereby optimizing the adhesion strength while maintaining fine wiring width.

Inventive Principle:
Principle #35Parameter changes

2Ease of manufacture

If the copper plating layer is formed with insufficient adhesion to the seed layer, then the manufacturing process is simpler, but the copper plating layer can easily collapse when unnecessary portions of the seed layer are removed by etching liquid

Engineering Contradiction:
Improveease of forming copper plating layerVSAvoidstability of copper plating layer during etching
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies preliminary action by establishing adequate adhesion between the seed layer and copper plating layer before the etching process begins. The copper plating layer is formed with controlled BP occupancy (45% or less) to ensure sufficient adhesion is already in place, preventing collapse during the subsequent etching operation where unnecessary seed layer portions are removed.

Inventive Principle:
Principle #10Preliminary action

3Strength

If a resist layer with specific composition is used to control BP occupancy, then adhesion is improved, but the manufacturing process becomes more complex

Engineering Contradiction:
Improveadhesion between seed layer and copper plating layerVSAvoidcomplexity of resist layer composition
Core Design Contradiction:
StrengthVSDevice complexity

Solution Approach 1:

The patent employs parameter changes by specifying particular compositional parameters for the resist layer, including the photopolymerization initiator (2,4,5-triarylimidazole dimer derivative) and the photopolymerizable component (compound with oxyalkylene group). These parameter specifications enable control of BP occupancy to 45% or less, improving adhesion while providing clear manufacturing guidelines rather than increasing unnecessary complexity.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Improves the adhesion between the seed layer and copper plating layer, preventing collapse and ensuring stability of fine wirings.

Implementation Method 1

the resist layer comprises a binder polymer, a photopolymerizable component, and a photopolymerization initiator

Methodology Applied
Scientific EffectPhotopolymerization: Photopolymerisation

Implementation Method 2

forming a copper plating layer comprising a portion having a width of less than 10 μm on the seed layer exposed in the opening by electrolytic plating

Methodology Applied
Scientific EffectElectrolytic plating: Electroplating

Data Source

PatentUS20250267799A1Method for manufacturing wiring board, method for evaluating resist layer or wiring board, and wiring board
Publication Date: 2025.08.21 RESONAC CORP
  • US20250267799A1 patent drawing
  • US20250267799A1 patent drawing
  • US20250267799A1 patent drawing

AI summary

A method for manufacturing a wiring board, the method including: providing a resist layer on a seed layer containing a metal, the seed layer being provided on a main surface of a substrate; forming a pattern including an opening through which the seed layer is exposed on the resist layer by exposure and development of the resist layer; and forming a copper plating layer including a portion having a width of less than 10 μm on the seed layer exposed in the opening by electrolytic plating. The copper plating layer is formed so that a BP occupancy, which is an occupancy of a black portion observed in a cross section of a metal portion including the seed layer and the copper plating layer in a width direction of the copper plating layer, is 45% or less. The resist layer is selected. The BP occupancy is a value as determined by a method including calculating the BP occupancy according to the following equation:BP⁢ occupancy⁢ (%)=∑i=1nwi×1L×1⁢0⁢0.