Fine Pitch Hard Mask Patterning for Semiconductor Resolution
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional photolithography processes face resolution limitations in forming fine pitch patterns, leading to non-uniform spacer thickness and the need for additional trimming processes, which complicates semiconductor device fabrication and increases costs due to separate pattern formation in regions with different densities.
Innovation Solution
A method involving the formation of first and second hard mask patterns with different etch selectivity ratios, where recesses are created between the first line patterns, and the second line patterns are formed within these recesses, allowing for simultaneous formation of fine patterns with varying pitches and sizes using anisotropic etching processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional photolithography processes are used to form fine pitch patterns, then the process is simple and well-established, but the resolution limitation prevents formation of sufficiently fine patterns
Solution Approach 1:
The patterning process is segmented into multiple steps: first forming a mandrel pattern, then forming spacer patterns on sidewalls, and finally using these spacers as hard masks for etching. This segmentation allows achieving fine pitch patterns that cannot be obtained through single-step photolithography.
Solution Approach 2:
The patent employs nested patterning where spacer patterns are formed on the sidewalls of mandrel patterns, and then these spacers themselves become masks for forming subsequent patterns. Each patterning step is nested within the previous structure, enabling progressive refinement of pattern dimensions.
2Manufacturing precision
If the spacer is formed thicker than intended to obtain uniform thickness, then the thickness uniformity is improved, but the spacer becomes difficult to remove and additional trimming processes are required
Solution Approach 1:
The patent uses materials with different etch selectivities for mandrels and spacers, allowing the spacer to be removed selectively after serving its masking function. The etch selectivity parameter is optimized so that the spacer can be cleanly removed without damaging the underlying structure.
Solution Approach 2:
The spacer pattern serves as a temporary hard mask during the etching process and is then selectively removed (discarded) after completing its masking function. This allows the spacer to be formed with sufficient thickness for uniformity while enabling easy removal afterward.
3Manufacturing precision
If separate pattern formation processes are used for high density and low density regions, then each region can be optimized, but the fabrication process becomes more complex and costly
Solution Approach 1:
The patent develops a universal spacer-based patterning methodology that can be applied to both high-density and low-density regions without requiring separate process flows. The same basic steps of mandrel formation, spacer deposition, and anisotropic etching work across different pattern densities, simplifying the overall fabrication process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method simplifies the fabrication of fine patterns by overcoming resolution limitations and enabling the simultaneous formation of patterns with different pitches and sizes without additional trimming processes, reducing costs and patterning errors.
Implementation Method 1
performing an anisotropic etching process on the first layer using the first line patterns and the second line patterns as an etch mask, thereby exposing the etch target layer disposed between the first line patterns and the second line patterns
Data Source
AI summary
A method of forming a fine pattern of a semiconductor device using a fine pitch hard mask is provided. A first hard mask pattern including first line patterns formed on an etch target layer of a substrate with a first pitch is formed. A first layer including a top surface where a recess is formed between adjacent first line patterns is formed. A second hard mask pattern including second line patterns within the recess is formed. An anisotropic etching process is performed on the first layer using the first and the second line patterns as an etch mask. Another anisotropic etching process is performed on the etch target layer using the first and the second hard mask patterns as an etch mask.