FinFET Active Region Layout for Mixed-Speed and Low-Leakage Fins
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing FinFET active region formation processes are inadequate for creating flexible designs that can integrate both high speed/high drive current and low leakage transistors in the same active region, limiting design flexibility and increasing routing complexity.
Innovation Solution
A method using a patterned hard mask and patterned photoresist layer with two-directional exposure patterning to form non-rectangular active regions with varying fin elements, allowing high speed/high drive current and low consumption/low leakage transistors to be placed in close proximity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If existing FinFET active region formation processes are used, then manufacturing simplicity is maintained, but design flexibility is limited
Solution Approach 1:
The active region formation process is segmented into multiple patterning steps: first forming a preliminary pattern, then using spacer deposition and additional photoresist patterning to achieve the final non-rectangular active region shape. This allows different portions of the active region to be independently controlled, enabling integration of both high speed and low leakage transistor designs within the same region.
Solution Approach 2:
The patent applies local quality by creating different active region geometries in different portions of the device. Specifically, some areas have active regions configured for high speed operation while other areas have active regions optimized for low leakage operation. This is achieved through selective patterning and spacer formation that creates non-uniform active region shapes across the substrate.
2Adaptability or versatility
If non-rectangular active regions with varying fin elements are created, then design flexibility is improved, but manufacturing complexity increases
Solution Approach 1:
The patent employs preliminary action by first forming a preliminary pattern of the active region, then depositing spacers that define subsequent patterning steps. This preliminary structure guides the formation of the final non-rectangular active region, making the complex manufacturing process more manageable by breaking it into sequential, controlled steps rather than attempting to form the final pattern in a single step.
Solution Approach 2:
The patent uses spacer structures as intermediary elements between the preliminary pattern and the final active region configuration. These spacers serve as temporary structures that define the boundaries and shapes of the active regions during manufacturing, and are later removed or integrated into the final device structure. This intermediary approach simplifies the overall manufacturing process by providing a controlled intermediate state.
Data Source
AI summary
Semiconductor structures and fabrication processes are provided. A semiconductor according to the present disclosure includes a first region including a first fin, a second fin, and a third fin extending along a first direction, and a second region abutting the first region. The second region includes a fourth fin and a fifth fin extending along the first direction. The first fin is aligned with the fourth fin and the second fin is aligned with the fifth fin. The third fin terminates at an interface between the first region and the second region.