Adjustable Fin Height in FinFET Devices via Selective Liner Removal
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Solution Overview
Problem
FinFET devices face issues with current leakage due to height irregularities between source/drain and gate region fins, caused by processes like spacer RIE and EPI pre-clean, leading to non-uniform effective fin heights.
Innovation Solution
A method involving partial nitride and oxide liner removal processes to create divots and recess nitride liners before dummy gate deposition, allowing for adjustable effective fin height in the gate region without damaging nitride spacers, thus maintaining uniform fin heights across source/drain and gate regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If spacer RIE and EPI pre-clean processes are used to form fins, then drive strength is improved, but height irregularities occur between source/drain and gate region fins causing current leakage
Solution Approach 1:
The patent applies preliminary action by performing selective nitride liner removal and creating divots in the gate region before completing the fin formation process. This advance preparation allows for compensating height differences that will occur during subsequent EPI growth and spacer formation, ensuring uniform effective fin heights across different regions and preventing current leakage while maintaining drive strength
Solution Approach 2:
The patent implements local quality by applying different processing treatments to different regions of the fin structure. Specifically, the gate region receives selective nitride liner removal and divot creation, while the source/drain regions maintain their original fin structure. This localized modification ensures that each region has the appropriate characteristics for its function, with the gate region compensated for height variations
2Power
If EPI features are grown on source/drain fins to increase drive strength, then current flow is improved, but effective fin height becomes non-uniform between source/drain and gate regions
Solution Approach 1:
The patent performs selective nitride liner removal and divot creation in the gate region before EPI growth occurs. This preliminary action compensates for the height increase that will occur in source/drain regions during EPI processing, ensuring that effective fin heights remain uniform across all regions after EPI features are formed
Solution Approach 2:
The patent changes the physical parameters of the gate region fins by removing nitride liners and creating divots, which modifies the effective fin height in the gate region. This parameter adjustment compensates for the height changes that occur in source/drain regions during EPI processing, maintaining overall uniformity
3Manufacturing precision
If additional nitride etching is performed to adjust fin height, then effective fin height uniformity is improved, but nitride spacers are damaged
Solution Approach 1:
The patent applies local quality by performing selective nitride liner removal only in the gate region using localized masking, while preserving the nitride spacers in the source/drain regions. This spatially selective approach allows height adjustment where needed without compromising the structural integrity of the nitride spacers that are critical for device isolation
Solution Approach 2:
The patent performs preliminary selective nitride removal and divot creation in the gate region before forming nitride spacers. This sequence ensures that height adjustments are made to the gate fins without affecting the subsequently formed nitride spacers, maintaining both fin height uniformity and spacer integrity
Data Source
AI summary
A method and system are disclosed herein for an adjustable effective fin height in a gate region of a finFET device. Fin structures, each having a first height, a fin, an oxide liner, and a nitride liner, are formed. A first portion of the nitride liner is removed. A first portion of the oxide liner is removed. A second portion of the nitride liner in a gate portion of the finFET. Source/drain(s) are formed, and a nitride spacer between the source/drain and the gate portion is formed. A second portion of the oxide liner is exposed by removing the second portion of the nitride liner, exposing a second portion of the fin, wherein the first and second exposed portions of the fin being an effective fin height in the gate portion.


