FinFET Air Gap Spacers Reduce Parasitic Capacitance
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Solution Overview
Problem
As device dimensions decrease, forming and maintaining the components of Field Effect Transistors (FETs) becomes increasingly difficult, requiring a solution that retains the benefits of traditional FET structures while addressing scaling issues.
Innovation Solution
The formation of fin Field Effect Transistors (finFETs) with air gaps is achieved by creating sacrificial spacers that are laterally etched to form void spaces between the source/drain and gate structures, reducing parasitic capacitance and increasing breakdown voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If device dimensions are decreased to improve integration density, then productivity increases, but manufacturing precision deteriorates due to difficulty in forming and maintaining FET components
Solution Approach 1:
Sacrificial spacers are formed in advance during the fabrication process to define the precise locations where air gaps will eventually be created. These spacers are deposited and patterned before the air gap formation step, allowing precise control over the final air gap positioning and dimensions even as device sizes shrink
Solution Approach 2:
Sacrificial spacers serve as intermediary structures that temporarily occupy the space where air gaps will eventually form. These spacers mediate the fabrication process by providing a removable template that ensures precise air gap formation, allowing the actual air gaps to be created with high precision through selective removal of the sacrificial material
2Reliability
If air gaps are introduced to reduce parasitic capacitance and increase breakdown voltage, then device performance improves, but device complexity increases due to additional fabrication steps
Solution Approach 1:
The formation of air gaps is merged with the existing sacrificial spacer fabrication process. The same spacer deposition and patterning techniques used for other device features are utilized to create the air gap definitions, combining multiple functions into a single process flow rather than adding entirely separate fabrication steps
Solution Approach 2:
Sacrificial spacers are deposited as temporary structures that will be selectively removed to create air gaps. This approach allows the air gap formation to be achieved through a standard deposit-remove-deposit sequence that integrates with existing fabrication processes, minimizing additional complexity while achieving the desired device performance improvements
3Object-generated harmful factors
If sacrificial spacers are used to form air gaps, then parasitic capacitance is reduced, but loss of substance occurs due to material removal
Solution Approach 1:
The harmful parasitic capacitance is eliminated by extracting the dielectric material and replacing it with air gaps. The sacrificial spacers enable this extraction by defining the precise locations where material removal will occur, allowing the harmful capacitive coupling to be removed while maintaining the structural integrity of the device
Data Source
AI summary
A fin field effect transistor device with air gaps, including a source/drain layer on a substrate, one or more vertical fin(s) in contact with source/drain layer, a gate metal fill that forms a portion of a gate structure on each of the one or more vertical fin(s), and a bottom void space between the source/drain layer and the gate metal fill.