FinFET Backside Power Rail Layout for Lower Voltage Drop
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Solution Overview
Problem
Conventional integrated circuits face increased voltage drop and power consumption due to the scaling down of power rails, which is not adequately addressed by existing semiconductor fabrication approaches.
Innovation Solution
The implementation of backside power rails and self-aligned vias in FinFET devices, which includes forming semiconductor layers, patterning fins, isolating structures, and creating gate stacks, source/drain trenches, and backside power rails to reduce resistance and enhance integration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If power rails are scaled down to accommodate smaller integrated circuits, then device integration is improved, but voltage drop increases and power consumption increases
Solution Approach 1:
The patent introduces backside power rails that extend from the rear surface of the substrate, creating a three-dimensional power distribution architecture. This dimensional change allows power delivery paths to bypass the crowded front-side interconnect layers, providing longer and more direct current paths that reduce resistance and voltage drop while maintaining compact planar footprint for high device integration.
2Productivity
If power rails are scaled down, then device integration is improved, but voltage drop across power rails increases
Solution Approach 1:
By extending power rails to the backside of the substrate and allowing them to continue underneath active device regions, the patent creates extended current paths that avoid the constraints of front-side routing. This dimensional approach reduces the number of via transitions and wire segments, thereby reducing cumulative resistance and voltage drop while maintaining high device density.
Solution Approach 2:
The power distribution network is segmented into front-side interconnects for local device connections and backside power rails for main power delivery. This segmentation allows each portion to be optimized independently: front-side interconnects provide flexible device access while backside rails provide low-resistance power supply, collectively reducing overall voltage drop.
3Ease of manufacture
If conventional interconnect structures are used, then manufacturing is simpler, but the number of metal tracks for direct source/drain connections is limited
Solution Approach 1:
The patent utilizes the backside of the substrate as an additional dimensional space for routing power rails and forming self-aligned vias. This approach effectively doubles the available routing space without complicating the front-side manufacturing process, allowing numerous metal tracks to be formed for direct source/drain connections while maintaining conventional front-side fabrication techniques.
Data Source
AI summary
A semiconductor structure includes a power rail on a back side of the semiconductor structure, a first interconnect structure on a front side of the semiconductor structure, and a source feature, a drain feature, a first semiconductor fin, and a gate structure that are between the power rail and the first interconnect structure. The first semiconductor fin connects the source feature and the drain feature. The gate structure is disposed on a front surface and two side surfaces of the first semiconductor fin. The semiconductor structure further includes an isolation structure disposed between the power rail and the drain feature and between the power rail and the first semiconductor fin and a via penetrating through the isolation structure and connecting the source feature to the power rail.