FinFET Boron-Doped Strained Layer Contact Resistance
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Solution Overview
Problem
Existing FinFET devices and methods for forming them are not entirely satisfactory in achieving optimal performance due to limitations in dopant profile concentration and contact resistance, which affect the complexity and efficiency of IC processing and manufacturing.
Innovation Solution
A method for forming a FinFET device involving the use of boron-doped strained layers with high surface concentration, achieved through ion implantation or plasma doping, followed by silicide formation to reduce contact resistance and modulate threshold voltage, replacing conventional pre-amorphous implant steps to enhance device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional pre-amorphous implant steps are used, then the processing complexity is reduced, but the dopant profile concentration and contact resistance performance are insufficient
Solution Approach 1:
The patent applies preliminary action by performing ion implantation or plasma doping to introduce boron dopants into the strained layer before the silicide formation step. This pre-doping approach establishes the necessary dopant profile concentration in advance, enabling subsequent silicide formation to proceed with optimized electrical characteristics without requiring complex post-processing adjustments
Solution Approach 2:
The patent implements parameter changes by modifying the dopant concentration parameters through controlled ion implantation or plasma doping processes. By adjusting implantation energy, dose, and plasma conditions, the method achieves high surface concentration dopant profiles that optimize contact resistance and threshold voltage modulation while maintaining processing feasibility
2Reliability
If dopant concentration is increased to reduce contact resistance, then contact resistance decreases, but short channel effects are enhanced
Solution Approach 1:
The patent applies local quality by creating a non-uniform dopant distribution within the strained layer. The ion implantation or plasma doping process introduces higher dopant concentration at the surface region where contact resistance is critical, while maintaining lower concentration in the bulk region to minimize short channel effects. This spatially differentiated doping profile optimizes both contact resistance and device performance
Solution Approach 2:
The patent utilizes parameter changes by controlling the implantation energy and doping depth to achieve an optimized dopant concentration gradient. By adjusting these parameters, the method creates a tailored dopant profile that provides high surface concentration for low contact resistance while maintaining appropriate bulk concentration to suppress short channel effects
3Manufacturing precision
If ion implantation or plasma doping is used to achieve high surface concentration, then dopant profile precision is improved, but manufacturing complexity increases
Solution Approach 1:
The patent applies preliminary action by integrating the ion implantation or plasma doping step into the existing fabrication sequence at an optimal point before silicide formation. This timing allows the dopant profile to be established early, enabling subsequent processing steps to benefit from the pre-configured electrical characteristics without requiring additional complex manufacturing operations
Solution Approach 2:
The patent implements self-service by allowing the ion implantation or plasma doping process to automatically achieve the desired dopant profile through controlled physical mechanisms. The process parameters (energy, dose, plasma conditions) are optimized to self-regulate the dopant distribution, reducing the need for complex post-processing adjustments and manual intervention
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively reduces contact resistance and parasitic resistance, improves device performance by increasing surface dopant concentration, and suppresses short channel effects, thereby enhancing the overall efficiency of FinFET devices.
Implementation Method 1
achieved through ion implantation or plasma doping
Implementation Method 2
achieved through ion implantation or plasma doping
Implementation Method 3
followed by silicide formation to reduce contact resistance
Data Source
AI summary
A FinFET device and a method of forming the same are disclosed. In accordance with some embodiments, a FinFET device includes a substrate having at least one fin, a gate stack across the at least one fin, a strained layer aside the gate stack and a silicide layer over the strained layer. The strained layer has a boron surface concentration greater than about 2E20 atom/cm3 within a depth range of about 0-5 nm from a surface of the strained layer.