FinFET Bottom Portion Structure for Source-Drain Leakage Isolation
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Solution Overview
Problem
In advanced semiconductor technology nodes, such as 2 nm or below, high purity un-doped silicon is insufficient in isolating source/drain portions from the substrate, leading to increased leakage current due to its limited ability to prevent electrical interference, and replacing it with dielectric materials results in slower growth rates and poorer quality source/drain formation.
Innovation Solution
A semiconductor structure is developed with source/drain portions formed using doped semiconductor materials and additional bottom portions made of group IV semiconductor material doped with trapping elements, which are epitaxially grown to reduce leakage current and improve quality by increasing the distance between source/drain and substrate, and trapping dopants to prevent diffusion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high purity un-doped silicon is used to isolate source/drain portions from substrate, then electrical isolation is provided, but leakage current increases due to insufficient isolation ability at advanced nodes
Solution Approach 1:
The patent employs a composite material structure consisting of multiple epitaxial layers with different doping characteristics. The bottom portion uses a first doping concentration while the upper portion uses a second doping concentration, creating a graded structure that simultaneously achieves electrical isolation and suppresses leakage current through the differential doping profiles.
Solution Approach 2:
The invention applies different doping concentrations to different regions of the epitaxial structure. The bottom portion has a first doping concentration optimized for isolation, while the upper portion has a second doping concentration optimized for device performance, allowing each region to fulfill its specific function locally.
2Object-generated harmful factors
If dielectric materials are used to replace un-doped silicon for isolation, then leakage current is reduced, but source/drain growth rate decreases and quality deteriorates
Solution Approach 1:
The patent changes the doping parameter of the semiconductor material from undoped or uniformly doped to a structure with varying doping concentrations at different depths. This parameter change allows the material to maintain its semiconductor properties for high-quality source/drain formation while the doping gradient provides leakage suppression functionality.
3Area of stationary object
If source/drain portions are formed closer to substrate to increase transistor density, then area is reduced, but leakage current increases due to decreased isolation distance
Solution Approach 1:
The invention changes the electrical parameter of the isolation layer by implementing a graded doping structure, transforming it from a simple geometric spacer into an electrically optimized barrier that can suppress leakage even at reduced physical distances, enabling higher transistor density without sacrificing isolation performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively suppresses substrate leakage current and enhances the electrical performance of transistors by reducing defects and ensuring better epitaxial growth of source/drain portions, thereby improving the power-performance-area (PPA) characteristics of semiconductor devices.
Implementation Method 1
each of which is capable of trapping the dopant impurities when the dopant impurities in the first semiconductor material diffuse toward the fin portion
Implementation Method 2
forming two bottom portions each of which is disposed between the fin portion and a corresponding one of the two source/drain portions
Data Source
AI summary
A method for manufacturing a semiconductor structure includes: forming a channel portion on a fin portion; forming two source/drain portions on the fin portion and at two opposite sides of the channel portion, in which each of the two source/drain portions includes a first semiconductor material that is doped with dopant impurities; and forming two bottom portions each of which is disposed between the fin portion and a corresponding one of the two source/drain portions, in which each of the two bottom portions includes a second semiconductor material that is different from the first semiconductor material and that is capable of trapping the dopant impurities when the dopant impurities in the first semiconductor material diffuse toward the fin portion.


