FinFET Source/Drain Buffer Structure for Dopant Leakage Control

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Solution Overview

Problem

In fin-based transistors, dopants from the source/drain region can diffuse into the mesa region, leading to increased electron tunneling, short channel effects, and leakage, which degrade device performance.

Innovation Solution

A buffer region is formed under the source/drain region to prevent dopant migration, with a sidewall layer and dielectric region used to further block dopant diffusion, thereby reducing short channel effects and leakage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If dopants are introduced into the source/drain region, then electrical conductivity is improved, but dopant diffusion into the mesa region increases causing short channel effects and leakage

Engineering Contradiction:
Improvedevice performanceVSAvoiddopant diffusion
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

A buffer region is introduced between the source/drain region and the mesa region to act as an intermediary barrier. This buffer region prevents dopants from diffusing into the mesa region while allowing the source/drain region to maintain its electrical conductivity function.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The source/drain structure is segmented into multiple regions: the highly doped source/drain region for electrical conduction, the buffer region to block dopant diffusion, and the mesa region for device operation. This segmentation allows each region to fulfill its specific function without interfering with others.

Inventive Principle:
Principle #1Segmentation

2Speed

If the channel length is reduced to increase switching speed, then device speed is improved, but short channel effects and leakage increase

Engineering Contradiction:
Improveswitching speedVSAvoidshort channel effects
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The buffer region serves as a mediator that allows the channel length to be reduced for faster switching while preventing the harmful short channel effects that would normally result from such reduction. The buffer region decouples the relationship between channel length and dopant diffusion.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The buffer region changes the effective parameters of the device by introducing a transition zone that modifies the electric field distribution and dopant concentration gradient, allowing short channel operation without the typical penalties of increased leakage and short channel effects.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If a buffer region is added to prevent dopant diffusion, then device reliability is improved, but device structure complexity increases

Engineering Contradiction:
Improvedevice performanceVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The buffer region is formed using the same fin structure and materials as the rest of the device, maintaining homogeneity in the manufacturing process. This approach adds functional complexity without introducing fundamentally new materials or process steps, thereby limiting the increase in overall device complexity.

Inventive Principle:
Principle #33Homogeneity

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances device performance by decreasing short channel effects, off-current, and leakage, leading to improved switching characteristics and reliability.

Implementation Method 1

A buffer region is formed under the source/drain region to prevent dopant migration

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Data Source

PatentUS20230299138A1Semiconductor device and manufacturing methods thereof
Publication Date: 2023.09.21 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20230299138A1 patent drawing
  • US20230299138A1 patent drawing
  • US20230299138A1 patent drawing

AI summary

Some implementations described herein provide techniques and semiconductor devices in which a buffer region is formed under a source/drain region of a device. The buffer region is configured to reduce, prevent, and/or block migration of dopants from the source/drain region to other areas of the device, such a mesa region of an adjacent fin structure. In some implementations, a sidewall layer is between the buffer region and the mesa region. Additionally, or alternatively, a dielectric region including a dielectric gas may be between the buffer region and the source/drain region.