FinFET Buffer Layer Stress Control for Leakage Reduction

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Solution Overview

Problem

Current FinFET fabrication methods face challenges with current leakage and overall performance due to bottlenecks in the design of fin-shaped structures, which affect the control of the channel region and threshold voltage.

Innovation Solution

A method involving the formation of a buffer layer with multiple elements, such as silicon germanium, on a substrate to create fin-shaped structures through epitaxial growth and shallow trench isolation, which helps in stress adjustment and isolation, thereby improving the fabrication process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional FinFET fabrication is used, then the manufacturing process is simple, but current leakage occurs and device performance deteriorates

Engineering Contradiction:
Improvedevice performanceVSAvoidfabrication process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

A buffer layer is formed in advance within a recess structure before the main fin-shaped semiconductor layer is created. This preliminary buffer layer preparation enables better control of the channel region and reduces current leakage, addressing reliability issues while maintaining a structured fabrication approach

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The fabrication process is segmented into distinct stages: forming a recess, depositing a buffer layer in the recess, then forming the epitaxial fin structure. This segmentation allows each step to be optimized independently, improving device performance without overwhelming complexity

Inventive Principle:
Principle #1Segmentation

2Object-generated harmful factors

If the channel region control is improved, then current leakage is reduced, but the fabrication process becomes more complex

Engineering Contradiction:
Improvecurrent leakageVSAvoidfabrication process complexity
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The buffer layer is selectively formed only within the recess region, creating local quality enhancement at the critical channel interface. This localized approach improves channel control and reduces current leakage precisely where needed, without requiring complex modifications to the entire device structure

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The buffer layer acts as an intermediary between the substrate and the fin-shaped semiconductor structure. This intermediate layer provides better interface quality and stress control, reducing current leakage while maintaining a relatively simple overall fabrication process

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the control over the channel region and reduces current leakage, improving the overall performance of FinFET devices by forming a more effective buffer layer and epitaxial structure.

Implementation Method 1

forming a buffer layer with multiple elements, such as silicon germanium, on a substrate to create fin-shaped structures through epitaxial growth and shallow trench isolation, which helps in stress adjustment and isolation

Methodology Applied
Scientific EffectStress adjustment: Stress Relaxation

Implementation Method 2

creating fin-shaped structures through epitaxial growth

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentUS10121881B2Semiconductor device and method for fabricating the same
Publication Date: 2018.11.06 UNITED MICROELECTRONICS CORP
  • US10121881B2 patent drawing
  • US10121881B2 patent drawing
  • US10121881B2 patent drawing

AI summary

A semiconductor device preferably includes a substrate, a fin-shaped structure on the substrate, a buffer layer on the fin-shaped structure, and an epitaxial layer on the buffer layer. Preferably, the buffer layer is made of silicon germanium and including three or more than three elements. The buffer layer also includes dopants selected from the group consisting of P, As, Sb, Bi, C, and F.