FinFET Gate Stack With Cap Layer Tuning for Threshold Voltage Control
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Solution Overview
Problem
As CMOS technology advances, scaling down n-type and p-type field effect transistors on semiconductor devices becomes challenging due to the need for more complex circuits, requiring innovative methods to tune the threshold voltages of these transistors effectively.
Innovation Solution
The formation of semiconductor devices involves creating n-channel and p-channel regions using different materials, such as silicon and silicon germanium, and adjusting the germanium concentration and dopant concentration in cap layers to control the threshold voltages of FinFETs and nanowire FETs, utilizing materials like hafnium oxide and rare earth compounds to form gate dielectrics and cap layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If transistor size is scaled down to increase circuit complexity, then more circuits can be integrated, but manufacturing precision and threshold voltage control become more difficult
Solution Approach 1:
The patent applies local quality by forming different cap layer structures on n-type and p-type fins. Specifically, a first cap layer with a first thickness is formed on the n-type fin, while a second cap layer with a second thickness (different from the first) is formed on the p-type fin. This localized differentiation allows precise control of threshold voltages for each transistor type despite overall scaling, resolving the contradiction between increased integration density and maintained manufacturing precision.
Solution Approach 2:
The patent utilizes parameter changes by varying the thickness of cap layers deposited on different fin types. The first cap layer thickness on n-type fins is deliberately different from the second cap layer thickness on p-type fins. This parameter variation enables independent tuning of threshold voltages for n-type and p-type transistors, maintaining precise voltage control even as device dimensions are scaled down to increase circuit density.
2Manufacturing precision
If different materials are used for n-channel and p-channel regions, then threshold voltage tuning capability is improved, but device complexity increases
Solution Approach 1:
The patent implements local quality by applying different cap layer configurations to n-type and p-type fins. The first cap layer on the n-type fin has a first thickness, while the second cap layer on the p-type fin has a second thickness. This localized structural differentiation provides threshold voltage tuning capability without requiring fundamentally different materials throughout the device, thereby managing complexity while achieving precise voltage control.
Data Source
AI summary
A semiconductor device includes first and second fins, first and second hafnium oxide layers, first and second cap layers, and first and second metal gate electrodes. The first and second fins protrude above a substrate and respectively have an n-channel region and a p-channel region. The first and second hafnium oxide layers wrap around the n-channel region and the p-channel region, respectively. The first and second cap layers wrap around the first and second annular hafnium oxide layers, respectively. The first and second cap layers are made of a same material that is lanthanum oxide, yttrium oxide, or strontium oxide. The first and second metal gate electrodes wrap around the first and second cap layers, respectively. The first and second metal gate electrodes have a same metal composition. The first and second gate dielectrics have a same dielectric composition.