FinFET Fin Structure With Silicon Cap Width Protection

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing FinFET devices and fabrication methods face challenges in precisely controlling the width of the fin structure, leading to potential mechanical integrity issues and carrier mobility degradation during the formation of the gate dielectric layer.

Innovation Solution

The method involves forming a cap layer over the fin structure before growing the gate dielectric layer, which protects the fin structure and allows for precise control of its width, thereby preventing consumption during gate dielectric formation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the fin structure width is not precisely controlled during gate dielectric formation, then the fabrication process is simpler, but mechanical integrity issues and carrier mobility degradation occur

Engineering Contradiction:
Improvefin structure width controlVSAvoidfabrication process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

A cap layer is formed over the fin structure before the gate dielectric layer is deposited. This preliminary action protects the fin structure during subsequent processing steps, enabling precise width control without compromising mechanical integrity or carrier mobility.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the fin structure is consumed during gate dielectric formation, then the fabrication process is simpler, but carrier mobility degrades

Engineering Contradiction:
Improvecarrier mobilityVSAvoidfabrication process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The cap layer serves as an intermediary protective layer between the fin structure and the gate dielectric formation process. It prevents direct consumption of the fin structure while allowing the gate dielectric to be formed, thereby maintaining carrier mobility without oversimplifying the process.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Strength

If no protection is provided during gate dielectric formation, then the fabrication process is simpler, but mechanical integrity is compromised

Engineering Contradiction:
Improvemechanical integrity of fin structureVSAvoidfabrication process complexity
Core Design Contradiction:
StrengthVSDevice complexity

Solution Approach 1:

The cap layer is formed in advance before gate dielectric deposition, providing preliminary protection to the fin structure. This maintains mechanical integrity during the fabrication process while adding only one additional step to the工艺流程.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach ensures the mechanical integrity of the fin structure and maintains carrier mobility, enhancing the overall performance and reliability of the FinFET device.

Implementation Method 1

depositing a silicon cap layer over the fin structure... growing an oxide layer over the silicon cap layer... The silicon cap layer is thinned after growing an oxide layer over the silicon cap layer

Methodology Applied
Scientific EffectPhysical barrier protection:

Data Source

PatentUS20250089286A1Fin field effect transistor device structure
Publication Date: 2025.03.13 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250089286A1 patent drawing
  • US20250089286A1 patent drawing
  • US20250089286A1 patent drawing

AI summary

A fin field effect transistor device structure includes a fin structure formed over a substrate. The structure also includes a liner layer and an isolation structure surrounding the fin structure. The structure also includes a gate dielectric layer formed over the fin structure and the isolation structure. The structure also includes a gate structure formed over the gate dielectric layer. The structure also includes source/drain epitaxial structures formed on opposite sides of the gate structure. The fin structure includes a protruding portion laterally extending over the liner layer.