FinFET Cavity Confinement for Short Circuit Prevention
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In the fabrication of fin-type field effect transistors (FinFETs), the growth of semiconductor compounds on recessed fin portions can lead to short circuits due to lateral contact with neighboring fins, and increasing fin spacing reduces integration density.
Innovation Solution
A process involving trimming the gate dielectric layer to reduce its thickness, forming spacers, and creating cavities on the fins to confine semiconductor compound growth, preventing lateral contact and ensuring sufficient strain and volume, thereby increasing process margin and preventing short circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the distance between two neighboring fins is increased to prevent short circuit, then the reliability is improved, but the integration degree is reduced
Solution Approach 1:
The fin structure is segmented into multiple parts: the original fin, spacer regions, and semiconductor compound regions. This segmentation allows the semiconductor compound to be confined within specific cavities defined by spacers, preventing lateral contact between neighboring fins while maintaining close fin spacing for high integration density
Solution Approach 2:
Spacer structures are introduced as intermediary elements between neighboring fins. These spacers define cavities that confine the semiconductor compound growth, acting as physical barriers that prevent lateral contact between adjacent fin structures while allowing the fins to remain closely spaced
2Ease of manufacture
If the gate dielectric layer is trimmed to reduce thickness, then the ease of manufacture is improved, but the manufacturing precision is worsened
Solution Approach 1:
The gate dielectric layer is preliminarily trimmed before fin recess formation to reduce its thickness. This preliminary action makes subsequent processing steps easier, particularly the removal of gate dielectric material during fin recess formation, while the trimming is performed with controlled precision to maintain overall manufacturing quality
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The process allows for the formation of semiconductor compounds with sufficient depth and strain, preventing short circuits between neighboring fins while maintaining high integration density by confining the growth of semiconductor compounds with spacers, thus enhancing the fabrication of FinFET structures.
Implementation Method 1
the step of trimming the gate dielectric layer includes a dry or wet etching step
Implementation Method 2
a semiconductor compound having a lattice parameter different from that of the material of the fin is grown based on the recessed portions of the fin
Data Source
AI summary
A process for fabricating a fin-type field effect transistor (FinFET) structure is described. A semiconductor substrate is patterned to form a fin. A spacer is formed on the sidewall of the fin. A portion of the fin is removed, such that the spacer and the surface of the remaining fin together define a cavity. A piece of a semiconductor compound is formed from the cavity, wherein the upper portion of the piece of the semiconductor compound laterally extends over the spacer.


