FinFET Channel Structure With Capping-Layer Isolation Protection

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Solution Overview

Problem

Existing FinFET devices face challenges in avoiding adverse impacts on fin structures during the formation of isolation regions, which affect processing complexity and device performance.

Innovation Solution

A method is employed to form fin-like field-effect transistors (FinFETs) by using capping layers to prevent adverse impacts on fin structures during isolation region formation, and by forming dielectric layers to achieve targeted isolation thickness, ensuring process flexibility and device reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If isolation regions are formed using conventional methods, then isolation is achieved, but fin structures suffer adverse impacts such as damage or deformation

Engineering Contradiction:
Improvefin structure integrityVSAvoidadverse impacts on fin structures
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A capping layer is introduced as an intermediary protective element between the fin structure and the isolation formation process. This capping layer absorbs or mitigates the harmful effects of the isolation process on the fin structure, allowing isolation to be formed without damaging the fins. The capping layer acts as a buffer that protects the delicate fin structures during subsequent processing steps.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The capping layer is formed on the fin structures before the isolation regions are created. This preliminary protective action ensures that when isolation formation processes (such as etching or deposition) are subsequently applied, the fin structures are already shielded and will not suffer adverse impacts from these processes.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If complex processing steps are used to protect fin structures, then fin structure integrity is maintained, but processing complexity increases

Engineering Contradiction:
Improvefin structure integrityVSAvoidprocessing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The processing sequence is segmented into distinct stages: first forming the fin structures, then applying the capping layer, and finally creating the isolation regions. This segmentation allows each step to be optimized independently while maintaining overall simplicity. The capping layer formation is a separate, simple deposition step that does not complicate the overall process flow.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The capping layer serves as a simple intermediary that can be deposited using standard thin-film techniques. This approach maintains processing simplicity while effectively protecting the fin structures, avoiding the need for complex in-situ protection methods or multiple intricate processing steps.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If isolation thickness is not precisely controlled, then manufacturing is simpler, but device performance and reliability deteriorate

Engineering Contradiction:
Improvedevice performanceVSAvoidisolation thickness control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The capping layer formation process incorporates thickness control mechanisms that provide feedback during deposition. By monitoring and controlling the capping layer thickness, the subsequent isolation thickness can be precisely determined, ensuring that the final isolation regions meet the required specifications for device performance while maintaining manufacturing control.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The isolation thickness is controlled by adjusting deposition parameters (such as deposition rate, time, or temperature) during the capping layer and isolation formation processes. By precisely controlling these parameters, the isolation thickness can be accurately determined to achieve the desired device performance and reliability without compromising manufacturing simplicity.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12520568B2Channel structure for FinFET device
Publication Date: 2026.01.06 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12520568B2 patent drawing
  • US12520568B2 patent drawing
  • US12520568B2 patent drawing

AI summary

The present disclosure provides a method, which includes forming a first fin structure and a second fin structure over a substrate, which has a first trench positioned between the first and second fin structures. The method also includes forming a first dielectric layer within the first trench, recessing the first dielectric layer to expose a portion of the first fin structure, forming a first capping layer over the exposed portion of the first fin structure and the recessed first dielectric layer in the first trench, forming a second dielectric layer over the first capping layer in the first trench while the first capping layer covers the exposed portion of the first fin feature and removing the first capping layer from the first fin structure.