FinFET Channel Reliability via Epitaxial Height Segmentation

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Solution Overview

Problem

Fin field-effect transistor (FinFET) devices suffer from hot carrier injection (HCI) effects, which adversely affect their reliability, and existing techniques are ineffective in suppressing these effects.

Innovation Solution

A semiconductor device structure is designed with a substrate having semiconductor fins with specific height variations and epitaxial layers, along with sidewall spacers and source/drain regions, to shift the channel region away from the gate insulating layer, preventing hot carriers from entering the gate electrode.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If FinFET devices are designed with conventional structures, then high drive current and low power consumption are achieved, but hot carrier injection effects adversely affect reliability

Engineering Contradiction:
Improvedevice reliabilityVSAvoidhot carrier injection effects
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces a three-dimensional fin structure with varying heights (first portion, second portion, third portion) to spatially separate the channel region from the gate insulating layer. This dimensional approach creates a vertical gradient where the channel is positioned lower, preventing hot carriers generated in the drain region from reaching the gate electrode, thus resolving the reliability issue without sacrificing drive current performance

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If the channel region is positioned close to the gate insulating layer, then effective gate control is achieved, but hot carriers easily enter the gate electrode reducing reliability

Engineering Contradiction:
Improvehot carrier reliabilityVSAvoidchannel region position
Core Design Contradiction:
ReliabilityVSLength of moving object

Solution Approach 1:

The fin structure is segmented into three distinct portions with different heights: the first portion (highest) provides gate control, the second portion (intermediate) contains the channel region, and the third portion (lowest) forms the source/drain interface. This segmentation allows the channel to be positioned lower for hot carrier suppression while maintaining effective gate control through the higher first portion

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration improves the reliability of FinFET devices by moving the channel region down, ensuring that generated hot carriers do not enter the gate electrode, thereby enhancing the device's operational reliability.

Implementation Method 1

The first portion comprises an epitaxial layer adjacent to the gate structure, and protrudes from the upper surface of the second portion

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentEP3208836B1A method to improve HCI performance for finfet
Publication Date: 2019.12.25 SEMICON MFG INT (SHANGHAI) CORP
  • EP3208836B1 patent drawingFigure 1
  • EP3208836B1 patent drawingFigure 2~3
  • EP3208836B1 patent drawingFigure 4

AI summary

A semiconductor device includes a substrate structure, multiple fins protruding from the substrate structure, each of the fins having a first portion, a second portion on opposite sides of the first portion, and a third portion at an outer side of the first portion and adjacent to the second portion, a gate structure on the upper surface of the first portion, sidewall spacers on opposite sides of the gate structure and covering the upper surface of the second portion, and source and drain regions outside of the sidewall spacers. The source and drain regions each have an upper surface higher than the second portion upper surface. The first portion protrudes from the second portion. The upper surface of the second portion is lower than the first portion upper surface. The upper surface of the third portion is lower than the second portion upper surface.