FinFET Channel Mobility via Amorphous Source-Drain Strain

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional methods for forming FinFET devices face challenges in achieving effective channel straining due to the small dimensions and 3-D topography of FinFET elements, leading to issues like dopant diffusion and increased short channel effects such as drain-induced barrier lowering (DIBL) and leakage.

Innovation Solution

A method involving the growth of an epitaxial doped layer over fins to form a merged source and drain region, followed by ion implantation to amorphize the fins, and subsequent deposition of a nitride layer to induce strain, which is then annealed to re-crystallize and form strained source and drain regions that enhance channel mobility.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional channel straining methods are used in FinFET devices, then carrier mobility enhancement is achieved, but dopant diffusion and short channel effects increase

Engineering Contradiction:
Improvecarrier mobilityVSAvoiddopant diffusion and short channel effects
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent changes the physical state of the source/drain region from crystalline to amorphous through ion implantation, preventing dopant diffusion while maintaining the ability to induce strain in the channel region for mobility enhancement

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces an intermediary amorphous layer between the source/drain region and the channel, which acts as a barrier to dopant diffusion while still allowing strain to be transmitted to the channel for carrier mobility enhancement

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If traditional straining techniques are applied to FinFETs, then channel strain is induced, but manufacturing precision deteriorates due to small dimensions and 3-D topography

Engineering Contradiction:
Improvechannel strainVSAvoidstrain control accuracy
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent segments the source/drain region into distinct amorphous and crystalline portions, allowing independent control of strain induction and dopant placement, thereby improving manufacturing precision in the constrained FinFET geometry

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent utilizes the vertical dimension of the FinFET structure by creating an amorphous layer that extends through the fin height, enabling effective strain induction despite the small lateral dimensions and complex 3-D topography

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces dopant diffusion and short channel effects, improving carrier mobility and device performance by inducing controlled stress on the channel region, thereby enhancing the performance of FinFET devices.

Implementation Method 1

growing an epitaxial doped layer over a exposed portion of a plurality of fins, the epitaxial doped layer combines the exposed portion of the fins to form a merged source and drain region

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Implementation Method 2

implanting the fins through the epitaxial doped layer to change the crystal lattice of the fins to form amorphized fins

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 3

annealing the semiconductor structure to re-crystallize the amorphized fins to form re-crystallized fins

Methodology Applied
Scientific EffectAnnealing: Annealing

Implementation Method 4

annealing the semiconductor structure to re-crystallize the amorphized fins to form re-crystallized fins

Methodology Applied
Scientific EffectCrystallization: Crystallisation

Implementation Method 5

the re-crystallized fins, the epitaxial doped layer and the nitride layer form a strained source and drain region which induces stress to a channel region

Methodology Applied
Scientific EffectStress:

Data Source

PatentUS9275907B23D transistor channel mobility enhancement
Publication Date: 2016.03.01 GLOBALFOUNDRIES US INC
  • US9275907B2 patent drawing
  • US9275907B2 patent drawing
  • US9275907B2 patent drawing

AI summary

A method of forming a semiconductor structure includes growing an epitaxial doped layer over an exposed portion of a plurality of fins. The epitaxial doped layer combines the exposed portion of the fins to form a merged source and drain region. An implantation process occurs in the fins through the epitaxial doped layer to change the crystal lattice of the fins to form amorphized fins. A nitride layer is deposited over the semiconductor structure. The nitride layer covers the merged source and drain regions. A thermal treatment is performed in the semiconductor structure to re-crystallize the amorphized fins to form re-crystallized fins. The re-crystallized fins, the epitaxial doped layer and the nitride layer form a strained source and drain region which induces stress to a channel region.