FinFET Channel Width Recovery via SiGe Oxidation
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Solution Overview
Problem
The implementation of strained materials in Fin FET devices for enhanced carrier mobility poses challenges in CMOS fabrication, particularly in maintaining a straight fin profile and optimizing channel width during oxidation processes.
Innovation Solution
The process involves forming a stack of semiconductor layers with a SiGe intermediate layer, oxidizing it to form SiGe oxide, and then forming an epitaxial channel layer to recover the channel width, allowing for broader process windows and reduced thermal histories during oxidation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If strained materials are used in source/drain portions to enhance carrier mobility, then carrier mobility is improved, but maintaining a straight fin profile becomes difficult
Solution Approach 1:
The fin structure is segmented into multiple semiconductor layers with different materials (e.g., Si/SiGe/Si) stacked vertically. The SiGe intermediate layer is oxidized to form SiGe oxide, which provides strain to enhance carrier mobility in the channel while the oxide layer isolates the strain, preventing fin profile distortion. This segmentation allows independent optimization of mobility enhancement and structural integrity.
Solution Approach 2:
An oxide layer (SiGe oxide formed from oxidizing the SiGe intermediate layer) is introduced as an intermediary between the strained SiGe layer and the channel region. This oxide mediator transfers the beneficial strain effect to enhance carrier mobility while preventing direct contact between the strained material and the fin structure, thereby maintaining a straight fin profile during oxidation processes.
2Reliability
If oxidation process is extended to fully oxidize SiGe layer, then SiGe oxide is formed for strain enhancement, but channel width is reduced
Solution Approach 1:
The SiGe intermediate layer is oxidized to form SiGe oxide before final fin structure formation. This preliminary oxidation action creates the strained layer configuration early in the process, allowing subsequent epitaxial growth to recover channel width. By performing the oxidation beforehand, the channel width can be restored through controlled epitaxial growth of additional semiconductor layers, thus achieving both strain enhancement and width recovery.
Solution Approach 2:
The channel width is recovered by changing the growth parameters during epitaxial growth of the third semiconductor layer. By adjusting growth conditions (temperature, pressure, gas flow rates), the channel width is increased back to the desired dimension after the oxidation-induced reduction, while maintaining the SiGe oxide strain structure for enhanced carrier mobility.
3Productivity
If thermal processing time is reduced for broader process windows, then manufacturing efficiency is improved, but oxidation completeness may be compromised
Solution Approach 1:
The oxidation process parameters are optimized to achieve complete SiGe oxide formation in reduced time. By adjusting oxidation temperature, oxygen partial pressure, and gas composition, the oxidation kinetics are enhanced, allowing complete conversion of SiGe to SiGe oxide within a shorter time frame. This maintains oxidation completeness while improving manufacturing efficiency and enabling broader process windows.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables efficient oxidation of SiGe layers without compromising channel width, allowing for improved carrier mobility and reduced thermal processing time, thereby enhancing the performance and reliability of Fin FET devices.
Implementation Method 1
oxidizing it to form SiGe oxide
Implementation Method 2
forming an epitaxial channel layer to recover the channel width
Data Source
AI summary
In a method for manufacturing a semiconductor device, a fin structure including a first semiconductor layer, an oxide layer disposed over the first semiconductor layer and a second semiconductor layer disposed over the oxide layer is formed. An isolation insulating layer is formed so that the second semiconductor layer of the fin structure protrudes from the isolation insulating layer while the oxide layer and the first semiconductor layer are embedded in the isolation insulating layer. A third semiconductor layer is formed on the exposed second semiconductor layer so as to form a channel.