FinFET Channel Width Reduction for Series Resistance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As semiconductor devices are scaled down, FinFETs experience increased series resistance between the source and drain and the channel, leading to performance degradation, particularly at advanced technology nodes where maintaining sufficient performance becomes challenging.
Innovation Solution
The method involves forming a semiconductor device with a fin structure where the channel portion has a smaller width than the source/drain portions, and a gate electrode is disposed over the channel portion, resulting in a triangular or double-sigma shaped cross-section, which reduces resistance by providing an enlarged silicon film outside the gate area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If FinFETs are scaled down to advanced technology nodes, then device size is reduced, but series resistance between source/drain and channel increases
Solution Approach 1:
The patent applies local quality by creating a non-uniform fin structure where the channel portion has a different width than the source/drain portions. Specifically, the fin width is reduced in the channel region while maintaining larger width at source/drain ends, thereby locally optimizing the structure to reduce series resistance without compromising overall device scaling.
Solution Approach 2:
The patent utilizes the vertical dimension by forming a three-dimensional FinFET structure with controlled fin height and width variations along the vertical and horizontal axes. This dimensional approach allows the channel portion to have enhanced vertical control while source/drain portions benefit from larger horizontal cross-sections, effectively managing resistance through spatial dimensionality.
2Volume of moving object
If FinFETs are scaled down to advanced technology nodes, then device size is reduced, but performance deteriorates
Solution Approach 1:
The patent implements local quality by differentiating the fin structure into distinct regions: a channel portion with optimized width for performance and source/drain portions with larger cross-sections for current carrying capability. This localized structural differentiation maintains device performance despite overall scaling by optimizing each region's geometry for its specific function.
Solution Approach 2:
The fin structure is segmented into functionally distinct portions - the channel portion and source/drain portions - with different dimensional characteristics. This segmentation allows independent optimization of each region, enabling the channel to be scaled for performance while source/drain regions maintain larger dimensions to support current flow, thus preserving overall device performance during scaling.
3Length of moving object
If channel width is reduced for scaling, then device size is reduced, but resistance increases
Solution Approach 1:
The patent applies local quality by creating a fin structure where the channel portion has a specifically optimized width that is smaller than the source/drain portions. This local differentiation allows the channel region to achieve reduced dimensions for scaling while the source/drain regions maintain larger cross-sections to compensate for resistance, thereby resolving the contradiction between channel width reduction and resistance increase.
Data Source
AI summary
The present disclosure provides, in various aspects, a method of forming a semiconductor device and accordingly formed semiconductor devices. In accordance with some illustrative embodiments herein, a fin is provided in an upper surface of a substrate, the fin having a height dimension and an initial width dimension. After forming a mask on the fin, wherein the mask only partially covers an upper surface of the fin, the fin is exposed to an etch process for removing material in accordance with the mask such that a channel portion connecting end portions of the fin is formed. Herein, a width dimension of the channel portion is smaller than a width dimension of the end portions. In accordance with some illustrative embodiments of the present disclosure, the channel portion may substantially have a cross-section of one of a triangular shape and a double-sigma shape.