FinFET Composite Liner Conversion for Thermal Crystallization Control

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Solution Overview

Problem

FinFET devices face challenges in preventing crystallization of amorphous silicon liners during thermal processes, leading to defects and constraints on low-temperature processing, which limits integration density and yield in semiconductor manufacturing.

Innovation Solution

A surface treatment process converts the upper layer of the amorphous silicon liner into an oxide or nitride conversion layer, preventing crystallization and maintaining a smooth protection layer, allowing for higher temperature thermal processes and improved yield.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If amorphous silicon liner is used during thermal processes, then low-temperature processing is enabled, but crystallization defects occur during thermal processes

Engineering Contradiction:
Improvethermal processing temperatureVSAvoidliner crystallization defect
Core Design Contradiction:
TemperatureVSReliability

Solution Approach 1:

A surface treatment process is performed on the amorphous silicon liner before thermal processing to modify its surface properties. This preliminary treatment creates a surface layer that is more resistant to crystallization during subsequent high-temperature thermal processes, thereby preventing defects while enabling higher processing temperatures

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The surface treatment process changes the physical and chemical parameters of the amorphous silicon liner surface, such as introducing surface oxidation or nitridation. These parameter changes increase the thermal stability of the liner surface, preventing crystallization during thermal processing while maintaining the low-temperature processing benefits

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If amorphous silicon liner is used, then low-temperature processing is possible, but processing flexibility is limited

Engineering Contradiction:
Improvethermal processing flexibilityVSAvoidprocessing temperature range
Core Design Contradiction:
Adaptability or versatilityVSTemperature

Solution Approach 1:

The surface treatment is applied in advance to prepare the liner for a broader range of thermal processes. This preliminary modification enables the liner to withstand higher temperatures and more aggressive thermal conditions, thereby expanding the available processing temperature range and improving overall process flexibility

Inventive Principle:
Principle #10Preliminary action

3Productivity

If amorphous silicon liner is used without surface treatment, then manufacturing is simpler, but yield is reduced due to crystallization defects

Engineering Contradiction:
Improveproduction yieldVSAvoidsurface treatment process
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The surface treatment process modifies key parameters of the amorphous silicon liner surface (such as composition, structure, or surface energy) to enhance its thermal stability. This relatively simple parameter change prevents crystallization defects during thermal processing, significantly improving production yield without requiring complex additional manufacturing steps

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively prevents crystallization of the amorphous silicon liner, maintaining the critical dimension of FinFET fins and enabling wider thermal processing options, thus enhancing production yield and flexibility.

Implementation Method 1

A surface treatment process converts an upper layer of the liner into a conversion layer

Methodology Applied
Scientific EffectOxidation: Oxidation

Implementation Method 2

A surface treatment process converts an upper layer of the liner into a conversion layer

Methodology Applied
Scientific EffectNitridation: Nitriding

Data Source

PatentUS11894464B2Fin field-effect transistor device with composite liner for the Fin
Publication Date: 2024.02.06 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11894464B2 patent drawing
  • US11894464B2 patent drawing
  • US11894464B2 patent drawing

AI summary

A method of forming a semiconductor device includes forming a fin protruding above a substrate; forming a liner over the fin; performing a surface treatment process to convert an upper layer of the liner distal to the fin into a conversion layer, the conversion layer comprising an oxide or a nitride of the liner; forming isolation regions on opposing sides of the fin after the surface treatment process; forming a gate dielectric over the conversion layer after forming the isolation regions; and forming a gate electrode over the fin and over the gate dielectric.