FinFET Contact Structure With Concave Drain Source Regions
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Solution Overview
Problem
Conventional planar transistors face challenges in controlling the channel region due to short channel leakage effects, especially as semiconductor devices shrink below 30 nanometers, leading to increased leakage current and reduced gate control over the channel.
Innovation Solution
The implementation of FinFETs with a gate structure that wraps around the active region on three sides, combined with the formation of dislocation planes and recessed drain/source regions to enhance electron mobility and reduce contact resistance through concave surface design for improved landing areas of contacts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional planar transistors are used with reduced minimum feature size to increase integration density, then more components can be integrated into a given area, but leakage current increases due to short channel leakage effects
Solution Approach 1:
The patent transitions from planar transistors to FinFETs by adding a vertical dimension. The active region protrudes upward from the substrate surface forming a fin structure, and the gate wraps around three sides of this fin, creating a three-dimensional configuration that enhances gate control over the channel while maintaining scaled dimensions.
Solution Approach 2:
The gate structure is nested around the active region in a wrap-around configuration, enclosing the channel on three sides (front, back, and one side). This nested arrangement maximizes the gate's control surface area relative to the channel volume, effectively suppressing short channel leakage effects.
2Length of moving object
If the gate length is reduced to scale down device dimensions, then device size decreases, but the gate loses control over the channel region leading to increased leakage
Solution Approach 1:
By transitioning to a vertical fin structure with a wrapping gate, the patent maintains effective gate control despite reduced horizontal dimensions. The gate extends around three sides of the vertical fin, providing superior electrostatic control compared to a planar gate of equivalent footprint.
Solution Approach 2:
The FinFET structure employs a composite configuration combining vertical fin geometry with a multi-sided wrapping gate, creating a hybrid structure that achieves both miniaturization and enhanced control. The concave contact regions further add geometric complexity to optimize electrical properties.
Data Source
AI summary
A device comprises a substrate comprising a first portion and a second portion separated by an isolation region, a first gate structure over the first portion, a first drain/source region and a second drain/source region in the first portion and on opposite sides of the first gate structure, wherein the first drain/source region and the second drain/source have concave surfaces, a second gate structure over the second portion and a third drain/source region and a fourth drain/source region in the second portion and on opposite sides of the second gate structure, wherein the third drain/source region and the fourth drain/source have the concave surfaces.