FinFET Conformal Gate Oxide Nitridation
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Solution Overview
Problem
Conventional planar FETs face challenges such as sub-threshold swing degradation, significant drain-induced barrier lowering, and fluctuation of device characteristics when reduced in size, necessitating the development of alternative transistor structures like finFETs.
Innovation Solution
The formation of finFETs with conformal gate oxides, where the thickness and uniformity of gate oxides are configured according to the operating voltage of the finFETs, utilizing a surface nitridation process in combination with oxidation to improve conformity, and varying the gate oxide thickness and uniformity between high-voltage and low-voltage regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If planar FETs are reduced in size to increase density, then device footprint is reduced, but sub-threshold swing degradation and drain-induced barrier lowering occur
Solution Approach 1:
The patent transitions from planar FETs to finFETs by adding a vertical dimension. The channel is formed as a vertical fin structure extending from the substrate, allowing the gate to wrap around and control the channel from multiple directions (front, back, and sidewalls). This three-dimensional channel structure improves gate control and reduces short-channel effects while maintaining reduced footprint.
Solution Approach 2:
The patent employs a composite gate structure consisting of multiple materials: a high-k dielectric material (such as hafnium oxide) combined with a metal gate material. This composite gate stack provides superior electrical characteristics, including better gate control and reduced leakage, while enabling continued scaling of the device dimensions.
2Productivity
If gate oxide thickness is reduced to scale with device size, then device density increases, but gate oxide conformity and uniformity deteriorate
Solution Approach 1:
The patent performs surface nitridation of the fin structure before forming the gate oxide layer. This preliminary treatment modifies the surface properties of the fin, creating a more uniform and chemically stable surface that enables subsequent formation of a conformal and uniform gate oxide layer even at reduced thicknesses.
Solution Approach 2:
The patent changes the chemical composition of the fin surface through nitridation, introducing nitrogen atoms into the surface layer. This parameter change in surface chemistry improves the quality and uniformity of the gate oxide deposition process, enabling better conformity at thinner oxide thicknesses.
3Adaptability or versatility
If different gate oxide thicknesses are used for high-voltage and low-voltage regions, then operating characteristics are optimized, but manufacturing complexity increases
Solution Approach 1:
The patent implements different gate oxide thicknesses in different regions of the device. High-voltage regions receive thicker gate oxide layers for enhanced breakdown voltage, while low-voltage regions receive thinner gate oxide layers for optimal switching characteristics. This localized differentiation optimizes performance for each region's specific voltage requirements.
Solution Approach 2:
The patent divides the device into distinct high-voltage and low-voltage regions with separately optimized gate oxide thicknesses. This segmentation allows independent optimization of each region's electrical characteristics while using a unified finFET architecture, managing complexity through modular design.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability and performance of finFETs by achieving desired operating characteristics, including reduced failure rates and improved conformity of gate oxides, tailored to specific operating voltages, thereby addressing the limitations of planar FETs.
Implementation Method 1
The formation of such gate oxides may include a surface nitridation process in combination with a suitable oxidation process, which may improve the conformity of the gate oxides.
Implementation Method 2
The formation of such gate oxides may include a surface nitridation process in combination with a suitable oxidation process
Data Source
AI summary
An embodiment fin field-effect-transistor (finFET) includes a semiconductor fin comprising a channel region and a gate oxide on a sidewall and a top surface of the channel region. The gate oxide includes a thinnest portion having a first thickness and a thickest portion having a second thickness different than the first thickness. A difference between the first thickness and the second thickness is less than a maximum thickness variation, and the maximum thickness variation is in accordance with an operating voltage of the finFET.