FinFET Source/Drain Contact Layout With Selective Active Trenches
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Solution Overview
Problem
The challenge in semiconductor manufacturing is the increasing complexity and cost associated with forming source/drain contacts as feature sizes decrease, particularly due to the complexity of multiple patterning, deposition, and planarization processes.
Innovation Solution
A method is introduced for forming semiconductor devices that includes directly patterning and etching only those trenches that provide active contact features, eliminating the need for additional patterning, deposition, and planarization processes to form inactive source/drain contacts, and forming a conductive flyover feature to provide additional routing options.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple patterning, deposition, and planarization processes are used to form source/drain contacts, then contact features can be formed, but processing complexity and cost increase significantly
Solution Approach 1:
The patent extracts and eliminates unnecessary processing steps (multiple patterning, deposition, and planarization processes) from the contact formation sequence, retaining only the essential steps needed to form functional contact features while discarding redundant operations that increase complexity without adding value
Solution Approach 2:
Instead of forming all contact features (including inactive ones) through complete patterning and deposition sequences, the patent inverts the approach by selectively forming only active contact features and using selective removal to define inactive regions, thereby simplifying the overall process
2Manufacturing precision
If multiple patterning and deposition processes are used, then contact features can be formed, but production cost increases
Solution Approach 1:
The patent removes redundant deposition and patterning operations from the manufacturing sequence, keeping only the minimum necessary steps to achieve functional contact features, thereby directly reducing material consumption and process costs
Solution Approach 2:
The patent applies partial action by forming contact features only where needed (active regions) rather than uniformly across all regions, avoiding excessive material deposition and processing in areas where contacts are not required, thus reducing overall production cost
3Manufacturing precision
If inactive source/drain contacts are formed through additional patterning and deposition, then complete contact coverage is achieved, but processing steps increase
Solution Approach 1:
The patent extracts the formation of inactive contact features from the main processing sequence, treating them as optional or eliminatable elements that do not require complete patterning and deposition cycles, thereby improving overall processing efficiency
Solution Approach 2:
The patent performs preliminary selective formation of active contact features in the correct locations from the outset, so that subsequent steps only need to address inactive regions through simpler removal or filling operations, rather than requiring complete contact formation followed by selective elimination
Data Source
AI summary
A semiconductor structure includes a first semiconductor fin and a second semiconductor fin adjacent to the first semiconductor fin. The first and the second semiconductor fins extend lengthwise along a first direction over a substrate. A metal gate structure is disposed over the first and second semiconductor fins, the metal gate structure extending lengthwise along a second direction perpendicular to the first direction. A first epitaxial source/drain (S/D) feature is disposed over the first semiconductor fin, and a second epitaxial S/D feature is disposed over the second semiconductor fin. An interlayer dielectric (ILD) layer is disposed over the first and the second epitaxial S/D features. And an S/D contact is disposed directly above the first and second epitaxial S/D features. The S/D contact directly contacts the first epitaxial S/D feature, and the S/D contact is isolated from the second epitaxial S/D feature by the ILD layer.