FinFET Contact Etch Stop Layers for Thinner Gate and Source/Drain Links
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Solution Overview
Problem
The semiconductor industry faces challenges in achieving better electrical connections and reducing the overall thickness of semiconductor devices, particularly in FinFET devices, due to limitations in the formation of conductive features over gate stacks and source/drain regions.
Innovation Solution
The formation of etch stop layers within recesses of contact plugs allows for improved profiles of conductive features, reducing the device thickness and enhancing electrical connections by controlling the etch process and preventing leakage paths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the overall thickness of the semiconductor device is reduced, then integration density is improved, but maintaining effective conductive feature profiles becomes difficult
Solution Approach 1:
An etch stop layer is introduced as an intermediary component between the conductive feature and the gate stack. This etch stop layer has a thickness of 1-10 nm and provides a controlled etch resistance that enables precise formation of conductive feature profiles during the etching process, even in thinned devices
Solution Approach 2:
The patent changes the etch resistance parameter by introducing the etch stop layer with specific thickness (1-10 nm) and material properties. This parameter change allows the etching process to self-limit at the desired depth, maintaining conductive feature profile precision while enabling overall device thinning
2Volume of moving object
If the thickness of the device is reduced, then integration density improves, but electrical connection quality may deteriorate
Solution Approach 1:
The etch stop layer is formed in advance before the conductive feature deposition. This preliminary action establishes a precise stopping point for subsequent etching operations, ensuring that conductive features are formed at the optimal location for electrical connection, even in thinned devices
Data Source
AI summary
A semiconductor device including an etch stop layer and a method of forming is provided. The semiconductor device may include a source/drain region and a gate structure, wherein a first etch stop layer is over a conductive plug to a source/drain region and a second etch stop layer is over the gate structure. The first etch stop layer and the second etch stop layer may have different thicknesses. A dielectric layer may be formed over the first etch stop layer and the second etch stop layer, and contacts may be formed through the dielectric layer and the first and second etch stop layers.