FinFET Source/Drain Contact Gapfill for Void-Free Formation
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Solution Overview
Problem
As the semiconductor industry continues to reduce minimum feature sizes to improve integration density, new challenges arise in the manufacturing process, particularly in forming seamless and void-free contacts for epitaxial source/drain regions in FinFETs.
Innovation Solution
The process involves forming fins on a substrate, creating a gate stack over the fins, forming epitaxial source/drain regions, depositing a dielectric layer, and then using a reverse cut contact process to form conductive features. This process includes forming a gapfill in the opening between conductive features in a bottom-up fashion, using materials like Si or W, and replacing the gapfill with a dielectric material.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional contact formation processes are used, then manufacturing process complexity increases, but yield and reliability do not improve
Solution Approach 1:
The patent applies reverse cut contact formation where the contact opening is first formed through the dielectric layer, then a gapfill material is deposited to fill the opening, and finally the gapfill is selectively removed to create the contact opening again. This inverted sequence allows for better control of contact dimensions and eliminates the need for complex multiple patterning steps, thereby improving yield while reducing process complexity
Solution Approach 2:
The gapfill material is deposited in advance to fill the contact opening before the final contact formation. This preliminary action ensures that the contact opening is properly defined and any potential defects are eliminated early in the process, improving yield without adding complexity to the overall manufacturing sequence
2Productivity
If feature sizes are reduced to improve integration density, then more components can be integrated, but manufacturing challenges increase
Solution Approach 1:
The patent changes the parameter of contact formation by using gapfill material deposition with controlled thickness and selective removal. This allows precise control of contact dimensions even at reduced feature sizes, enabling higher integration density while maintaining ease of manufacture through a simplified single-step process
3Reliability
If seamless and void-free contacts are formed, then device performance and reliability improve, but process steps increase
Solution Approach 1:
The patent merges the contact opening definition and gapfill deposition into a single integrated process step. The gapfill material is deposited conformally to fill the contact opening, ensuring seamless and void-free contacts without requiring additional separate process steps, thus improving device reliability while maintaining process simplicity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in improved yield and reduced process complexity by ensuring seamless and void-free gapfills between conductive features, enhancing the overall performance and reliability of semiconductor devices.
Implementation Method 1
forming a gapfill in the opening in a bottom-up fashion
Data Source
AI summary
Methods of forming a semiconductor device structure are described. In some embodiments, the method includes forming fins from a substrate, forming a gate stack over portions of the fins, forming an epitaxial source/drain region adjacent the gate stack, depositing a dielectric layer over the epitaxial source/drain region, forming an opening in the dielectric layer, and forming a gapfill in the opening in a bottom-up fashion. The gapfill includes Si or W. The method further includes forming a conductive feature over the epitaxial source/drain region and replacing the gapfill with a dielectric material.