FinFET Contact Isolation via Insulator Layers
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Solution Overview
Problem
Conventional FinFET manufacturing processes face challenges with electrical connections between contacts, affecting device reliability due to the ease of connection between source, drain, and gate contacts.
Innovation Solution
A method involving the formation of a semiconductor structure with specific insulator layers and conductive materials to create contacts with controlled dimensions and positions, preventing unintended electrical connections by selectively etching and filling contact holes with conductive materials, ensuring each contact is isolated from others.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional FinFET manufacturing processes are used to form contacts to source, drain and gate, then the manufacturing process is simple, but the contacts may be easily electrically connected to each other, adversely affecting device reliability
Solution Approach 1:
The contact formation process is divided into multiple discrete steps: forming separate contact holes for gate contacts and source/drain contacts, selectively filling these holes with conductive materials, and creating isolation structures between adjacent contacts. This segmentation prevents unintended electrical connections between contacts while maintaining manufacturing feasibility through systematic process breakdown.
Solution Approach 2:
Insulator layers are introduced as intermediary materials between conductive contact structures to prevent electrical connection. The method forms insulator layers on sidewalls of contact holes and between adjacent contacts, creating physical and electrical isolation that eliminates the reliability issue of unintended connections.
2Reliability
If multiple insulator layers and conductive materials are formed to isolate contacts, then electrical isolation between contacts is improved, but the manufacturing process complexity increases
Solution Approach 1:
Insulator layers are formed preliminarily on the sidewalls of contact holes before filling with conductive materials. This preliminary action ensures that electrical isolation is established before subsequent processing steps, preventing contamination or unintended connections during later manufacturing operations.
Solution Approach 2:
The isolation approach extends from two-dimensional planar isolation to three-dimensional vertical isolation by forming insulator layers on sidewalls of contact holes and creating multi-layer insulator structures. This dimensional transition provides comprehensive electrical isolation in all directions around contacts.
Data Source
AI summary
A semiconductor device includes an active region having a doped region, a first contact member on the doped region, gate structures including a first gate structure having a first gate and a second gate structure having a second gate, the first and second gate structures being adjacent to each other and on opposite sides of the first contact member, an interlayer dielectric layer on the active region and surrounding the first and second gate structures, and the first contact member, a first insulator layer on a portion of the interlayer dielectric layer, a first contact on an upper surface of the first gate and a second contact on an upper surface of the second gate, and a second insulator layer surrounding the first and second contacts each having an upper surface lower than an upper surface of the second insulator layer.