FinFET Contact Plug Re-Entrant Profile for Lower Resistance and Capacitance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing FinFET devices face challenges in reducing electrical resistance and capacitance of contact plugs, which are crucial for improving the performance and integration density of semiconductor devices.
Innovation Solution
The formation of contact plugs with a re-entrant profile is achieved by using a combination of anisotropic and isotropic etching processes to create an enlarged lower portion of the opening, followed by the deposition of a sacrificial layer, a spacer layer, and an electrically conductive material, resulting in an air gap that reduces capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional contact plug formation is used, then the manufacturing process is simple, but the electrical resistance of contact plugs is high
Solution Approach 1:
The etching process is divided into two distinct segments: anisotropic etching to create the initial opening and isotropic etching to enlarge the lower portion. This segmentation allows each etching step to be optimized for its specific purpose, achieving the re-entrant profile that reduces contact resistance without requiring a single complex etching process
Solution Approach 2:
The contact plug opening is given different qualities at different locations: the upper portion maintains a narrower profile from anisotropic etching for good alignment, while the lower portion is enlarged through isotropic etching to reduce resistance. This local differentiation of geometric properties directly addresses the contradiction by optimizing each region for its specific functional requirement
2Reliability
If conventional contact plug formation is used, then the manufacturing process is simple, but the capacitance around contact plugs is high
Solution Approach 1:
The two-step etching process segments the opening formation into controlled stages, creating the re-entrant profile that reduces the average dielectric constant around the contact plug. This segmented approach enables capacitance reduction without requiring complete process redesign
Solution Approach 2:
The isotropic etching step changes the geometric parameters of the opening by enlarging the lower portion, which directly alters the electric field distribution and reduces parasitic capacitance. This parameter change through selective etching resolves the contradiction between simple processing and capacitance reduction
3Reliability
If contact plugs with re-entrant profile are formed, then electrical resistance is reduced, but the manufacturing precision requirements increase
Solution Approach 1:
By segmenting the etching into anisotropic and isotropic steps, each with controlled duration and conditions, the profile control is distributed across manageable stages rather than requiring single-step precision, thus reducing overall manufacturing difficulty
Solution Approach 2:
The sequential etching process maintains continuous useful action where the first etching step creates the foundation and the second step refines the profile. This continuous, staged approach to profile formation achieves high precision through cumulative control rather than single-step perfection
4Reliability
If contact plugs with re-entrant profile are formed, then capacitance is reduced, but the device complexity increases
Solution Approach 1:
The etching process is segmented into two specialized steps, each contributing a specific geometric feature that collectively reduces capacitance. This segmentation transforms a complex single-step requirement into two simpler, more controllable steps
Solution Approach 2:
Different etching modes (anisotropic vs. isotropic) are applied to different regions of the opening to achieve local geometric optimization. This local quality differentiation reduces overall device complexity by using targeted approaches rather than uniform complex processing
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the electrical resistance of the contact plugs and decreases capacitance by lowering the average dielectric constant around the contact plugs, thereby enhancing the performance and integration density of FinFET devices.
Implementation Method 1
performing a first etching process to form an opening in the first dielectric layer and in the second dielectric layer
Implementation Method 2
performing a second etching process to enlarge a lower portion of the opening proximate to the substrate
Data Source
AI summary
A method of forming a semiconductor device includes: forming a gate structure over a fin that protrudes above a substrate; forming source/drain regions over the fin on opposing sides of the gate structure; forming a first dielectric layer and a second dielectric layer successively over the source/drain regions; performing a first etching process to form an opening in the first dielectric layer and in the second dielectric layer, where the opening exposes an underlying electrically conductive feature; after performing the first etching process, performing a second etching process to enlarge a lower portion of the opening proximate to the substrate; and forming a contact plug in the opening after the second etching process.