FinFET Contact Plug Formation via Sacrificial Film Etching

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Solution Overview

Problem

In semiconductor device manufacturing, particularly for FinFETs, there is a challenge in forming accurate openings for contact plugs due to positional shifts caused by exposure accuracy issues, leading to increased leakage current or short circuits between wiring layers and the gate.

Innovation Solution

A method involving the formation of a first insulating film, a sacrifice film, and a hard mask pattern, followed by selective etching to create openings for a second insulating film and ultimately a contact plug, ensuring electrical connection between the source/drain and wiring layers while preventing gate etching and minimizing leakage or short circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional etching methods are used to form openings for contact plugs, then the manufacturing process is simple, but positional shifts occur due to exposure accuracy issues leading to increased leakage current or short circuits

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidopening position accuracy
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The gate is covered with an insulating film (first insulating film) before the PMD film formation process. This preliminary protective action ensures that even if the opening position shifts during etching, the gate remains protected from direct exposure, preventing leakage current and short circuits while maintaining manufacturing simplicity

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

By forming the first insulating film on the gate before creating openings, the patent provides a cushioning layer that compensates for potential positional shifts in opening formation. This beforehand protection ensures that the gate is shielded even when opening positions deviate from ideal locations, thereby maintaining electrical connection reliability

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Manufacturing precision

If a gate is covered with an insulating film made of a material different from the PMD film for self-aligned contact, then opening position accuracy is improved, but device complexity increases

Engineering Contradiction:
Improveopening position accuracyVSAvoidinsulating film structure complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The first insulating film serves multiple functions: it acts as a protective layer during opening formation, provides a base for subsequent PMD film deposition, and ensures electrical isolation. By making this single layer multi-functional, the patent achieves precise opening formation without significantly increasing device complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent combines the protective function and the structural function into a single first insulating film layer. This merging of functions eliminates the need for separate protective and structural layers, thereby achieving manufacturing precision improvement while minimizing increases in device complexity

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method effectively suppresses leakage current and short circuits by maintaining the desired distance between wiring layers and the gate, ensuring reliable electrical connections in FinFETs.

Implementation Method 1

a first opening forming step of forming a first opening by removing a part of the sacrifice film by using the hard mask film as an etching mask

Methodology Applied
Scientific EffectEtching:

Data Source

PatentUS11557661B2Method for manufacturing semiconductor device
Publication Date: 2023.01.17 TOKYO ELECTRON LTD
  • US11557661B2 patent drawing
  • US11557661B2 patent drawing
  • US11557661B2 patent drawing

AI summary

A method for manufacturing a semiconductor device includes: a first insulating film forming step of forming a first insulating film in a transistor having a structure in which a source and a drain raised in a fin shape are covered with a gate; a sacrifice film forming step of forming a sacrifice film; a hard mask pattern forming step of forming a hard mask film having a desired pattern; a first opening forming step of forming a first opening; a second insulating film forming step of forming a second insulating film made of a material different from the first insulating film, in the first opening; a second opening forming step of forming a second opening by removing the sacrifice film, after the second insulating film forming step; and a contact plug forming step of forming a contact plug in the second opening.