FinFET Source/Drain Contact Formation With Sacrificial Layer Patterning

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Solution Overview

Problem

The semiconductor industry faces challenges in manufacturing fin field-effect transistors (FinFETs) due to complexities in forming source/drain structures and patterning openings for contacts, which affect device performance and reliability.

Innovation Solution

A method is developed for forming source/drain structures and patterning openings in FinFETs using sacrificial layers with high etching selectivity, allowing precise control of structure size and minimizing damage to contact regions, enabling wrap-around contacts and improved contact area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional methods are used to form source/drain structures and pattern openings in FinFETs, then the manufacturing process is simpler, but the precision and control of structure size are reduced

Engineering Contradiction:

Improveprecision of source/drain structure formationVSAvoidcomplexity of manufacturing process

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent segments the manufacturing process into multiple distinct stages: forming first sacrificial layers, recessing them, forming second sacrificial layers, and selectively removing them. This segmentation allows precise control over source/drain structure formation and contact opening patterning, achieving high manufacturing precision while managing complexity through systematic process division

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent employs preliminary actions by forming sacrificial layers before the actual source/drain structures, recessing them in advance, and preparing contact openings beforehand. These preliminary steps establish precise geometric constraints that guide subsequent manufacturing operations, ensuring high precision in final structure dimensions

Inventive Principle:

Principle #10Preliminary action

2Reliability

If conventional patterning methods are used for contact openings, then the process is faster, but damage to contact regions occurs

Engineering Contradiction:

Improveintegrity of contact regionsVSAvoidmanufacturing efficiency

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The patent uses sacrificial layers as intermediary elements that protect contact regions during manufacturing. These sacrificial layers are formed, recessed, and selectively removed to create contact openings without directly damaging the underlying contact regions, thus maintaining reliability while enabling efficient manufacturing

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent applies preliminary anti-action by forming sacrificial layers that prevent damage to contact regions before the patterning process begins. The sacrificial layers are recessed and removed in a controlled manner that anticipates and prevents potential damage, ensuring contact region integrity throughout the manufacturing process

Inventive Principle:

Principle #9Preliminary anti-action

3Manufacturing precision

If precise control of structure size is achieved, then device performance is improved, but the manufacturing process becomes more complex

Engineering Contradiction:

Improvecontrol of structure sizeVSAvoidease of manufacturing process

Core Design Contradiction:

Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent employs parameter changes by systematically varying the dimensions and positions of sacrificial layers through controlled recessing operations. By adjusting the depth and extent of recessing, the patent achieves precise control over source/drain structure sizes and contact opening dimensions, optimizing device performance while maintaining manufacturability

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enhances the precision and effectiveness of source/drain structure formation and contact creation, reducing damage and ensuring void-free films, thereby improving FinFET performance and reliability.

Implementation Method 1

A first sacrificial layer is recessed to expose an upper portion of a source/drain structure

Methodology Applied

Scientific EffectEtching:

Implementation Method 2

A dielectric layer is formed in the opening

Methodology Applied

Scientific EffectDeposition: Deposition (physical)

Data Source

PatentUS12191304B2Method of manufacturing a semiconductor device and a semiconductor device

Publication Date: 2025.01.07 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

In a method of forming a FinFET, a first sacrificial layer is formed over a source/drain structure of a FinFET structure and an isolation insulating layer. The first sacrificial layer is recessed so that a remaining layer of the first sacrificial layer is formed on the isolation insulating layer and an upper portion of the source/drain structure is exposed. A second sacrificial layer is formed on the remaining layer and the exposed source/drain structure. The second sacrificial layer and the remaining layer are patterned, thereby forming an opening. A dielectric layer is formed in the opening. After the dielectric layer is formed, the patterned first and second sacrificial layers are removed to form a contact opening over the source/drain structure. A conductive layer is formed in the contact opening.