FinFET Contact Formation via Segmented Dielectric Recess

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

As semiconductor devices continue to integrate more components into smaller areas, challenges arise in forming reliable contacts and isolation regions within finFET devices, requiring improved processes for trench formation, dielectric filling, and contact creation to maintain device performance and yield.

Innovation Solution

The process involves forming trenches in a semiconductor substrate, filling them with dielectric material, recessing it to expose fin surfaces, creating gate stacks, and forming contacts with precise etching and deposition techniques to achieve tapered sidewalls and controlled dimensions, allowing for better integration density and process control.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If minimum feature size is reduced to increase integration density, then more components can be integrated into a given area, but manufacturing precision and reliability of contacts and isolation regions deteriorate

Engineering Contradiction:
Improveintegration densityVSAvoidcontact formation precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The contact formation process is divided into multiple sequential steps: forming a contact hole through the dielectric layer, depositing a first conductive layer, forming a second contact hole through the first conductive layer, and depositing a second conductive layer. This segmentation allows each step to be optimized independently, maintaining precision even as feature sizes are reduced for higher integration density.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The dielectric layer is recessed to expose the fin surface before contact formation begins. This preliminary action creates a prepared substrate with proper topology, ensuring that subsequent contact holes can be formed with precise control over depth and positioning, thereby maintaining manufacturing precision at smaller feature sizes.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If minimum feature size is reduced to increase integration density, then more components can be integrated into a given area, but reliability of contact structures deteriorates

Engineering Contradiction:
Improveintegration densityVSAvoidcontact structure reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The contact structure is divided into multiple conductive layers (first conductive layer and second conductive layer), each formed through separate deposition and patterning steps. This segmentation allows each layer to be optimized for specific functions, improving overall contact reliability while enabling smaller feature sizes for higher integration density.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The dielectric layer is recessed to expose the fin surface before contact formation. This preliminary preparation ensures proper electrical contact and mechanical stability, enhancing contact structure reliability even as features are scaled down for increased integration density.

Inventive Principle:
Principle #10Preliminary action

3Device complexity

If trench formation and dielectric filling processes are simplified, then manufacturing complexity is reduced, but manufacturing precision of contact and isolation regions deteriorates

Engineering Contradiction:
Improveprocess complexityVSAvoidisolation region precision
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

Trenches are formed and dielectric material is deposited and recessed to expose fin surfaces before contact formation. These preliminary actions establish precise isolation regions that define the boundaries for subsequent contact holes, ensuring high manufacturing precision without adding excessive process complexity.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10170427B2Semiconductor device and method
Publication Date: 2019.01.01 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10170427B2 patent drawing
  • US10170427B2 patent drawing
  • US10170427B2 patent drawing

AI summary

A representative method for manufacturing a semiconductor device (e.g., a fin field-effect transistor) includes the steps of depositing a first insulating material over a substrate, and forming a first conductive contact in the first insulating material. The first conductive contact has a protruding uppermost surface, with a first height along a central portion of the first conductive contact, and a second height along a vertical vector projection of a sidewall of the first conductive contact. The first height is larger than the second height. A second insulating material is deposited over the first insulating material, and a second conductive contact is formed in the second insulating material. The second conductive contact is disposed over and at least partially within the first conductive contact. A distance between a bottommost surface of the second conductive contact and the protruding uppermost surface of the first conductive contact is less than about 1.0 nm.