FinFET Corner Polymer Block Structure for Gate Leakage Isolation

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Solution Overview

Problem

Current metal gate transistor architecture in FinFET devices is insufficient in achieving desirable performance, particularly at the 10 nm node generation, due to issues with resistance and polymer block leakage during the replacement metal gate process.

Innovation Solution

The implementation of a semiconductor device structure that includes a gate structure with polymer blocks formed on corners between the gate and substrate, surrounded by spacers and an interfacial layer, which are oxidized to prevent leakage during the replacement metal gate process, and a method for fabricating this structure involving multiple etching and deposition processes to control the gate and source/drain regions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If polymer blocks are formed on corners between gate and substrate during replacement metal gate process, then leakage is prevented, but resistance issues persist in metal gate transistor architecture

Engineering Contradiction:
Improveleakage preventionVSAvoidresistance issues
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent introduces an interfacial layer as an intermediary between the polymer block and the substrate, and spacers as intermediaries between the polymer block and gate structure. These intermediary layers isolate the polymer block from direct contact with electrical components, preventing leakage while managing resistance through controlled interfaces.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The polymer block is used as a temporary sacrificial structure during the replacement metal gate process. It serves its leakage prevention function during fabrication and is subsequently removed, allowing the metal gate structure to be formed without permanent polymer interference.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

2Productivity

If metal gate transistor architecture is used in FinFET devices, then performance should improve, but resistance and leakage issues prevent desirable performance achievement

Engineering Contradiction:
Improvedevice performanceVSAvoidresistance and leakage control
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent performs preliminary actions by forming the polymer block and surrounding spacer structures before the metal gate formation process. This preliminary structure preparation prevents leakage during subsequent processing steps and enables successful metal gate integration in FinFET devices.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies local quality by creating polymer blocks specifically at corner regions between gate and substrate where leakage is most problematic, rather than uniformly throughout the structure. The spacers are also locally positioned to provide targeted leakage prevention where needed.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the control over the channel region and reduces leakage, improving the performance of FinFET devices by maintaining the polymer blocks as a barrier between the gate and spacers, thus addressing the resistance and leakage issues in current FinFET designs.

Implementation Method 1

which are oxidized to prevent leakage during the replacement metal gate process

Methodology Applied
Scientific EffectOxidation: Oxidation

Data Source

PatentUS11749743B2Semiconductor device and method for fabricating the same
Publication Date: 2023.09.05 UNITED MICROELECTRONICS CORP
  • US11749743B2 patent drawing
  • US11749743B2 patent drawing
  • US11749743B2 patent drawing

AI summary

A semiconductor device includes a gate structure on a substrate, a first spacer on sidewalls of gate structure, a second spacer on sidewalls of the first spacer, a polymer block adjacent to the first spacer and on a corner between the gate structure and the substrate, an interfacial layer under the polymer block, and a source/drain region adjacent to two sides of the first spacer. Preferably, the polymer block is surrounded by the first spacer, the interfacial layer, and the second spacer.