FinFET Diffusion Break Layout for Stress-Controlled Metal Gates
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Solution Overview
Problem
Current FinFET fabrication techniques face challenges in integrating single diffusion break (SDB) structures with metal gate fabrication, particularly in controlling stress and enhancing on/off current performance.
Innovation Solution
A semiconductor device is fabricated with a substrate featuring fin-shaped structures divided by a double diffusion break (DDB) structure on NMOS regions and a single diffusion break (SDB) structure on PMOS regions, using low-stress SiOCN dielectric materials and specific gate structures to manage stress and improve current performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If single diffusion break (SDB) structure is integrated with metal gate fabrication, then transistor performance is improved, but fabrication complexity and stress control remain problematic
Solution Approach 1:
The patent divides the fin-shaped structure into multiple segments using diffusion break structures (SDB or DDB) that partition the continuous fin into discrete regions. This segmentation allows independent stress control and carrier flow management in different transistor regions, improving overall device performance while enabling standardized fabrication processes for each segment.
Solution Approach 2:
The patent applies different diffusion break configurations (SDB for PMOS, DDB for NMOS) to different local regions based on specific stress requirements. Each region receives a tailored structure that optimizes carrier mobility and stress distribution locally, rather than applying a uniform approach across all transistors.
2Reliability
If fin-shaped structure is used to increase channel control, then overlapping area between gate and fin increases, but integration with SDB structure remains problematic
Solution Approach 1:
The diffusion break structures are formed preliminarily before metal gate fabrication, establishing the stress control architecture in advance. This preliminary action defines the regions and stress patterns that will guide subsequent gate formation, simplifying the integration process by pre-organizing the structure for later manufacturing steps.
Solution Approach 2:
The patent modifies physical parameters such as diffusion break depth, width, and material composition to optimize both channel control and manufacturability. By adjusting these parameters, the structure achieves effective stress control while remaining compatible with standard fabrication processes.
3Stress or pressure
If DDB structure divides fin-shaped structure, then stress control is improved, but manufacturing precision requirements increase
Solution Approach 1:
The diffusion break structures are designed to self-align with the fin-shaped structures through selective epitaxial growth and etching processes. The self-service mechanism utilizes the inherent geometry and material properties to automatically position the diffusion breaks at correct locations, reducing the need for high-precision external alignment and lowering manufacturing precision requirements.
Data Source
AI summary
A semiconductor device includes a substrate having a first region and a second region, a first fin-shaped structure extending along a first direction on the first region, a double diffusion break (DDB) structure extending along a second direction to divide the first fin-shaped structure into a first portion and a second portion, and a first gate structure and a second gate structure extending along the second direction on the DDB structure.